SURF  1.0
Generics | Ports | Libraries | Use Clauses
UartWrapper Entity Reference
protocols » uart
+ Inheritance diagram for UartWrapper:
+ Collaboration diagram for UartWrapper:

Entities

rtl  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
std_logic_arith 
std_logic_unsigned 
StdRtlPkg  Package <StdRtlPkg>

Generics

TPD_G  time := 1 ns
CLK_FREQ_G  real := 125 . 0e6
BAUD_RATE_G  integer := 115200
FIFO_BRAM_EN_G  boolean := false
FIFO_ADDR_WIDTH_G  integer range 4 to 48 := 4

Ports

clk   in sl
rst   in sl
wrData   in slv ( 7 downto 0 )
wrValid   in sl
wrReady   out sl
rdData   out slv ( 7 downto 0 )
rdValid   out sl
rdReady   in sl
tx   out sl
rx   in sl

Detailed Description

See also
entity

Definition at line 28 of file UartWrapper.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 31 of file UartWrapper.vhd.

◆ CLK_FREQ_G

CLK_FREQ_G real := 125 . 0e6
Generic

Definition at line 32 of file UartWrapper.vhd.

◆ BAUD_RATE_G

BAUD_RATE_G integer := 115200
Generic

Definition at line 33 of file UartWrapper.vhd.

◆ FIFO_BRAM_EN_G

FIFO_BRAM_EN_G boolean := false
Generic

Definition at line 34 of file UartWrapper.vhd.

◆ FIFO_ADDR_WIDTH_G

FIFO_ADDR_WIDTH_G integer range 4 to 48 := 4
Generic

Definition at line 35 of file UartWrapper.vhd.

◆ clk

clk in sl
Port

Definition at line 37 of file UartWrapper.vhd.

◆ rst

rst in sl
Port

Definition at line 38 of file UartWrapper.vhd.

◆ wrData

wrData in slv ( 7 downto 0 )
Port

Definition at line 40 of file UartWrapper.vhd.

◆ wrValid

wrValid in sl
Port

Definition at line 41 of file UartWrapper.vhd.

◆ wrReady

wrReady out sl
Port

Definition at line 42 of file UartWrapper.vhd.

◆ rdData

rdData out slv ( 7 downto 0 )
Port

Definition at line 44 of file UartWrapper.vhd.

◆ rdValid

rdValid out sl
Port

Definition at line 45 of file UartWrapper.vhd.

◆ rdReady

rdReady in sl
Port

Definition at line 46 of file UartWrapper.vhd.

◆ tx

tx out sl
Port

Definition at line 48 of file UartWrapper.vhd.

◆ rx

rx in sl
Port

Definition at line 49 of file UartWrapper.vhd.

◆ ieee

ieee
Library

Definition at line 19 of file UartWrapper.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 20 of file UartWrapper.vhd.

◆ std_logic_arith

std_logic_arith
Package

Definition at line 21 of file UartWrapper.vhd.

◆ std_logic_unsigned

std_logic_unsigned
Package

Definition at line 22 of file UartWrapper.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 24 of file UartWrapper.vhd.

The documentation for this class was generated from the following file: