SURF  1.0
Signals | Instantiations
mapping Architecture Reference

Signals

phyClock  sl
phyReset  sl
qplllock  sl
qplloutclk  sl
qplloutrefclk  sl
qpllRst  slv ( NUM_LANE_G - 1 downto 0 )
qpllReset  sl

Instantiations

tengigethgth7clk_inst  TenGigEthGth7Clk <Entity TenGigEthGth7Clk>
tengigethgth7_inst  TenGigEthGth7 <Entity TenGigEthGth7>

Detailed Description

Definition at line 79 of file TenGigEthGth7Wrapper.vhd.

Member Data Documentation

◆ phyClock

phyClock sl
Signal

Definition at line 81 of file TenGigEthGth7Wrapper.vhd.

◆ phyReset

phyReset sl
Signal

Definition at line 82 of file TenGigEthGth7Wrapper.vhd.

◆ qplllock

qplllock sl
Signal

Definition at line 84 of file TenGigEthGth7Wrapper.vhd.

◆ qplloutclk

qplloutclk sl
Signal

Definition at line 85 of file TenGigEthGth7Wrapper.vhd.

◆ qplloutrefclk

qplloutrefclk sl
Signal

Definition at line 86 of file TenGigEthGth7Wrapper.vhd.

◆ qpllRst

qpllRst slv ( NUM_LANE_G - 1 downto 0 )
Signal

Definition at line 88 of file TenGigEthGth7Wrapper.vhd.

◆ qpllReset

qpllReset sl
Signal

Definition at line 89 of file TenGigEthGth7Wrapper.vhd.

◆ tengigethgth7clk_inst

tengigethgth7clk_inst TenGigEthGth7Clk
Instantiation

Definition at line 118 of file TenGigEthGth7Wrapper.vhd.

◆ tengigethgth7_inst

tengigethgth7_inst TenGigEthGth7
Instantiation

Definition at line 172 of file TenGigEthGth7Wrapper.vhd.

The documentation for this class was generated from the following file: