SURF  1.0
Pgp2bGth7VarLatWrapper Entity Reference
+ Inheritance diagram for Pgp2bGth7VarLatWrapper:
+ Collaboration diagram for Pgp2bGth7VarLatWrapper:

Entities

mapping  architecture
 

Libraries

ieee 
unisim 

Use Clauses

std_logic_1164 
StdRtlPkg  Package <StdRtlPkg>
AxiStreamPkg  Package <AxiStreamPkg>
Pgp2bPkg  Package <Pgp2bPkg>
AxiLitePkg  Package <AxiLitePkg>
vcomponents 

Generics

TPD_G  time := 1 ns
CPLL_FBDIV_G  natural := 4
CPLL_FBDIV_45_G  natural := 5
CPLL_REFCLK_DIV_G  natural := 1
RXOUT_DIV_G  natural := 2
TXOUT_DIV_G  natural := 2
RX_CLK25_DIV_G  natural := 7
TX_CLK25_DIV_G  natural := 7
RX_OS_CFG_G  bit_vector := " 0000010000000 "
RXCDR_CFG_G  bit_vector := x " 0002007FE1000C2200018 "
RXDFEXYDEN_G  sl := ' 1 '
VC_INTERLEAVE_G  integer := 0
PAYLOAD_CNT_TOP_G  integer := 7
NUM_VC_EN_G  integer range 1 to 4 := 4
AXI_ERROR_RESP_G  slv ( 1 downto 0 ) := AXI_RESP_DECERR_C
TX_ENABLE_G  boolean := true
RX_ENABLE_G  boolean := true

Ports

pgpClk   in sl
pgpRst   in sl
pgpTxIn   in Pgp2bTxInType
pgpTxOut   out Pgp2bTxOutType
pgpRxIn   in Pgp2bRxInType
pgpRxOut   out Pgp2bRxOutType
pgpTxMasters   in AxiStreamMasterArray ( 3 downto 0 )
pgpTxSlaves   out AxiStreamSlaveArray ( 3 downto 0 )
pgpRxMasters   out AxiStreamMasterArray ( 3 downto 0 )
pgpRxCtrl   in AxiStreamCtrlArray ( 3 downto 0 )
gtTxP   out sl
gtTxN   out sl
gtRxP   in sl
gtRxN   in sl
txPreCursor   in slv ( 4 downto 0 ) := ( others = > ' 0 ' )
txPostCursor   in slv ( 4 downto 0 ) := ( others = > ' 0 ' )
txDiffCtrl   in slv ( 3 downto 0 ) := " 1000 "
axilClk   in sl := ' 0 '
axilRst   in sl := ' 0 '
axilReadMaster   in AxiLiteReadMasterType := AXI_LITE_READ_MASTER_INIT_C
axilReadSlave   out AxiLiteReadSlaveType
axilWriteMaster   in AxiLiteWriteMasterType := AXI_LITE_WRITE_MASTER_INIT_C
axilWriteSlave   out AxiLiteWriteSlaveType

Detailed Description

See also
entity

Definition at line 33 of file Pgp2bGth7VarLatWrapper.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 35 of file Pgp2bGth7VarLatWrapper.vhd.

◆ CPLL_FBDIV_G

CPLL_FBDIV_G natural := 4
Generic

Definition at line 37 of file Pgp2bGth7VarLatWrapper.vhd.

◆ CPLL_FBDIV_45_G

CPLL_FBDIV_45_G natural := 5
Generic

Definition at line 38 of file Pgp2bGth7VarLatWrapper.vhd.

◆ CPLL_REFCLK_DIV_G

CPLL_REFCLK_DIV_G natural := 1
Generic

Definition at line 39 of file Pgp2bGth7VarLatWrapper.vhd.

◆ RXOUT_DIV_G

RXOUT_DIV_G natural := 2
Generic

Definition at line 41 of file Pgp2bGth7VarLatWrapper.vhd.

◆ TXOUT_DIV_G

TXOUT_DIV_G natural := 2
Generic

Definition at line 42 of file Pgp2bGth7VarLatWrapper.vhd.

◆ RX_CLK25_DIV_G

RX_CLK25_DIV_G natural := 7
Generic

Definition at line 43 of file Pgp2bGth7VarLatWrapper.vhd.

◆ TX_CLK25_DIV_G

TX_CLK25_DIV_G natural := 7
Generic

Definition at line 44 of file Pgp2bGth7VarLatWrapper.vhd.

◆ RX_OS_CFG_G

RX_OS_CFG_G bit_vector := " 0000010000000 "
Generic

Definition at line 45 of file Pgp2bGth7VarLatWrapper.vhd.

◆ RXCDR_CFG_G

RXCDR_CFG_G bit_vector := x " 0002007FE1000C2200018 "
Generic

Definition at line 46 of file Pgp2bGth7VarLatWrapper.vhd.

◆ RXDFEXYDEN_G

RXDFEXYDEN_G sl := ' 1 '
Generic

Definition at line 47 of file Pgp2bGth7VarLatWrapper.vhd.

◆ VC_INTERLEAVE_G

VC_INTERLEAVE_G integer := 0
Generic

Definition at line 49 of file Pgp2bGth7VarLatWrapper.vhd.

◆ PAYLOAD_CNT_TOP_G

PAYLOAD_CNT_TOP_G integer := 7
Generic

Definition at line 50 of file Pgp2bGth7VarLatWrapper.vhd.

◆ NUM_VC_EN_G

NUM_VC_EN_G integer range 1 to 4 := 4
Generic

Definition at line 51 of file Pgp2bGth7VarLatWrapper.vhd.

◆ AXI_ERROR_RESP_G

AXI_ERROR_RESP_G slv ( 1 downto 0 ) := AXI_RESP_DECERR_C
Generic

Definition at line 52 of file Pgp2bGth7VarLatWrapper.vhd.

◆ TX_ENABLE_G

TX_ENABLE_G boolean := true
Generic

Definition at line 53 of file Pgp2bGth7VarLatWrapper.vhd.

◆ RX_ENABLE_G

RX_ENABLE_G boolean := true
Generic

Definition at line 54 of file Pgp2bGth7VarLatWrapper.vhd.

◆ pgpClk

pgpClk in sl
Port

Definition at line 57 of file Pgp2bGth7VarLatWrapper.vhd.

◆ pgpRst

pgpRst in sl
Port

Definition at line 58 of file Pgp2bGth7VarLatWrapper.vhd.

◆ pgpTxIn

Definition at line 60 of file Pgp2bGth7VarLatWrapper.vhd.

◆ pgpTxOut

Definition at line 61 of file Pgp2bGth7VarLatWrapper.vhd.

◆ pgpRxIn

Definition at line 63 of file Pgp2bGth7VarLatWrapper.vhd.

◆ pgpRxOut

Definition at line 64 of file Pgp2bGth7VarLatWrapper.vhd.

◆ pgpTxMasters

pgpTxMasters in AxiStreamMasterArray ( 3 downto 0 )
Port

Definition at line 66 of file Pgp2bGth7VarLatWrapper.vhd.

◆ pgpTxSlaves

pgpTxSlaves out AxiStreamSlaveArray ( 3 downto 0 )
Port

Definition at line 67 of file Pgp2bGth7VarLatWrapper.vhd.

◆ pgpRxMasters

pgpRxMasters out AxiStreamMasterArray ( 3 downto 0 )
Port

Definition at line 69 of file Pgp2bGth7VarLatWrapper.vhd.

◆ pgpRxCtrl

pgpRxCtrl in AxiStreamCtrlArray ( 3 downto 0 )
Port

Definition at line 70 of file Pgp2bGth7VarLatWrapper.vhd.

◆ gtTxP

gtTxP out sl
Port

Definition at line 72 of file Pgp2bGth7VarLatWrapper.vhd.

◆ gtTxN

gtTxN out sl
Port

Definition at line 73 of file Pgp2bGth7VarLatWrapper.vhd.

◆ gtRxP

gtRxP in sl
Port

Definition at line 74 of file Pgp2bGth7VarLatWrapper.vhd.

◆ gtRxN

gtRxN in sl
Port

Definition at line 75 of file Pgp2bGth7VarLatWrapper.vhd.

◆ txPreCursor

txPreCursor in slv ( 4 downto 0 ) := ( others = > ' 0 ' )
Port

Definition at line 77 of file Pgp2bGth7VarLatWrapper.vhd.

◆ txPostCursor

txPostCursor in slv ( 4 downto 0 ) := ( others = > ' 0 ' )
Port

Definition at line 78 of file Pgp2bGth7VarLatWrapper.vhd.

◆ txDiffCtrl

txDiffCtrl in slv ( 3 downto 0 ) := " 1000 "
Port

Definition at line 79 of file Pgp2bGth7VarLatWrapper.vhd.

◆ axilClk

axilClk in sl := ' 0 '
Port

Definition at line 81 of file Pgp2bGth7VarLatWrapper.vhd.

◆ axilRst

axilRst in sl := ' 0 '
Port

Definition at line 82 of file Pgp2bGth7VarLatWrapper.vhd.

◆ axilReadMaster

◆ axilReadSlave

Definition at line 84 of file Pgp2bGth7VarLatWrapper.vhd.

◆ axilWriteMaster

◆ axilWriteSlave

Definition at line 86 of file Pgp2bGth7VarLatWrapper.vhd.

◆ ieee

ieee
Library

Definition at line 20 of file Pgp2bGth7VarLatWrapper.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 21 of file Pgp2bGth7VarLatWrapper.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 23 of file Pgp2bGth7VarLatWrapper.vhd.

◆ AxiStreamPkg

AxiStreamPkg
Package

Definition at line 24 of file Pgp2bGth7VarLatWrapper.vhd.

◆ Pgp2bPkg

Pgp2bPkg
Package

Definition at line 25 of file Pgp2bGth7VarLatWrapper.vhd.

◆ AxiLitePkg

AxiLitePkg
Package

Definition at line 26 of file Pgp2bGth7VarLatWrapper.vhd.

◆ unisim

unisim
Library

Definition at line 28 of file Pgp2bGth7VarLatWrapper.vhd.

◆ vcomponents

vcomponents
Package

Definition at line 29 of file Pgp2bGth7VarLatWrapper.vhd.


The documentation for this class was generated from the following file: