SURF  1.0
Types | Signals | Constants | Processes | Instantiations
RTL Architecture Reference

Processes

PROCESS_192  ( STABLE_CLOCK )
timeouts  ( STABLE_CLOCK )
mmcm_lock_wait  ( STABLE_CLOCK )
PROCESS_193  ( TXUSERCLK )
PROCESS_194  ( STABLE_CLOCK )
PROCESS_195  ( STABLE_CLOCK )
PROCESS_196  ( STABLE_CLOCK )
timeout_buffer_bypass  ( TXUSERCLK )
reset_fsm  ( STABLE_CLOCK )

Constants

MMCM_LOCK_CNT_MAX  integer := 1024
STARTUP_DELAY  integer := 500
WAIT_CYCLES  integer := STARTUP_DELAY / STABLE_CLOCK_PERIOD
WAIT_MAX  integer := WAIT_CYCLES + 10
WAIT_TIMEOUT_2ms  integer := 2000000 / STABLE_CLOCK_PERIOD
WAIT_TLOCK_MAX  integer := 100000 / STABLE_CLOCK_PERIOD
WAIT_TIMEOUT_500us  integer := 500000 / STABLE_CLOCK_PERIOD
WAIT_1us_cycles  integer := 1000 / STABLE_CLOCK_PERIOD
WAIT_1us  integer := WAIT_1us_cycles + 10
MAX_RETRIES  integer := 2 ** RETRY_COUNTER_BITWIDTH - 1
MAX_WAIT_BYPASS  integer := 45824

Types

tx_rst_fsm_type ( INIT , ASSERT_ALL_RESETS , RELEASE_PLL_RESET , RELEASE_MMCM_RESET , WAIT_RESET_DONE , DO_PHASE_ALIGNMENT , RESET_FSM_DONE )

Signals

tx_state  tx_rst_fsm_type := INIT
soft_reset_sync  std_logic
init_wait_count  integer range 0 to WAIT_MAX := 0
init_wait_done  std_logic := ' 0 '
pll_reset_asserted  std_logic := ' 0 '
tx_fsm_reset_done_int  std_logic := ' 0 '
tx_fsm_reset_done_int_s2  std_logic := ' 0 '
tx_fsm_reset_done_int_s3  std_logic := ' 0 '
txresetdone_s2  std_logic := ' 0 '
txresetdone_s3  std_logic := ' 0 '
retry_counter_int  integer range 0 to MAX_RETRIES
time_out_counter  integer range 0 to WAIT_TIMEOUT_2ms := 0
count_1us  integer range 0 to WAIT_1us := 0
reset_time_out  std_logic := ' 0 '
count_1us_done  std_logic := ' 0 '
time_out_2ms  std_logic := ' 0 '
time_tlock_max  std_logic := ' 0 '
time_out_500us  std_logic := ' 0 '
mmcm_lock_count  integer range 0 to MMCM_LOCK_CNT_MAX - 1 := 0
mmcm_lock_int  std_logic := ' 0 '
mmcm_lock_i  std_logic := ' 0 '
mmcm_lock_reclocked  std_logic := ' 0 '
run_phase_alignment_int  std_logic := ' 0 '
run_phase_alignment_int_s2  std_logic := ' 0 '
run_phase_alignment_int_s3  std_logic := ' 0 '
wait_bypass_count  integer range 0 to MAX_WAIT_BYPASS - 1
time_out_wait_bypass  std_logic := ' 0 '
time_out_wait_bypass_s2  std_logic := ' 0 '
time_out_wait_bypass_s3  std_logic := ' 0 '
txuserrdy_i  std_logic := ' 0 '
refclk_lost  std_logic
gttxreset_i  std_logic := ' 0 '
txpmaresetdone_i  std_logic := ' 0 '
txpmaresetdone_sync  std_logic
pll0lock_sync  std_logic := ' 0 '
pll1lock_sync  std_logic := ' 0 '
pll0lock_prev  std_logic := ' 0 '
pll1lock_prev  std_logic := ' 0 '
pll0lock_ris_edge  std_logic := ' 0 '
pll1lock_ris_edge  std_logic := ' 0 '

Instantiations

sync_txuserrdy  Synchronizer <Entity Synchronizer>
sync_pmaresetdone  Synchronizer <Entity Synchronizer>
sync_soft_reset  Synchronizer <Entity Synchronizer>
sync_run_phase_alignment_int  Synchronizer <Entity Synchronizer>
sync_tx_fsm_reset_done_int  Synchronizer <Entity Synchronizer>
sync_txresetdone  Synchronizer <Entity Synchronizer>
sync_time_out_wait_bypass  Synchronizer <Entity Synchronizer>
sync_mmcm_lock_reclocked  Synchronizer <Entity Synchronizer>
sync_pll0lock  Synchronizer <Entity Synchronizer>
sync_pll1lock  Synchronizer <Entity Synchronizer>

Detailed Description

Definition at line 119 of file Gtp7TxRst.vhd.

Member Function Documentation

◆ PROCESS_192()

PROCESS_192 (   STABLE_CLOCK  
)
Process

Definition at line 196 of file Gtp7TxRst.vhd.

◆ timeouts()

timeouts (   STABLE_CLOCK)

Definition at line 222 of file Gtp7TxRst.vhd.

◆ mmcm_lock_wait()

mmcm_lock_wait (   STABLE_CLOCK  
)
Process

Definition at line 251 of file Gtp7TxRst.vhd.

◆ PROCESS_193()

PROCESS_193 (   TXUSERCLK)

Definition at line 288 of file Gtp7TxRst.vhd.

◆ PROCESS_194()

PROCESS_194 (   STABLE_CLOCK)

Definition at line 315 of file Gtp7TxRst.vhd.

◆ PROCESS_195()

PROCESS_195 (   STABLE_CLOCK)

Definition at line 341 of file Gtp7TxRst.vhd.

◆ PROCESS_196()

PROCESS_196 (   STABLE_CLOCK  
)
Process

Definition at line 356 of file Gtp7TxRst.vhd.

◆ timeout_buffer_bypass()

timeout_buffer_bypass (   TXUSERCLK  
)
Process

Definition at line 372 of file Gtp7TxRst.vhd.

◆ reset_fsm()

reset_fsm (   STABLE_CLOCK  
)
Process

Definition at line 408 of file Gtp7TxRst.vhd.

Member Data Documentation

◆ tx_rst_fsm_type

tx_rst_fsm_type ( INIT , ASSERT_ALL_RESETS , RELEASE_PLL_RESET , RELEASE_MMCM_RESET , WAIT_RESET_DONE , DO_PHASE_ALIGNMENT , RESET_FSM_DONE )
Type

Definition at line 121 of file Gtp7TxRst.vhd.

◆ tx_state

tx_state tx_rst_fsm_type := INIT
Signal

Definition at line 126 of file Gtp7TxRst.vhd.

◆ MMCM_LOCK_CNT_MAX

MMCM_LOCK_CNT_MAX integer := 1024
Constant

Definition at line 128 of file Gtp7TxRst.vhd.

◆ STARTUP_DELAY

STARTUP_DELAY integer := 500
Constant

Definition at line 129 of file Gtp7TxRst.vhd.

◆ WAIT_CYCLES

WAIT_CYCLES integer := STARTUP_DELAY / STABLE_CLOCK_PERIOD
Constant

Definition at line 130 of file Gtp7TxRst.vhd.

◆ WAIT_MAX

WAIT_MAX integer := WAIT_CYCLES + 10
Constant

Definition at line 131 of file Gtp7TxRst.vhd.

◆ WAIT_TIMEOUT_2ms

WAIT_TIMEOUT_2ms integer := 2000000 / STABLE_CLOCK_PERIOD
Constant

Definition at line 133 of file Gtp7TxRst.vhd.

◆ WAIT_TLOCK_MAX

WAIT_TLOCK_MAX integer := 100000 / STABLE_CLOCK_PERIOD
Constant

Definition at line 134 of file Gtp7TxRst.vhd.

◆ WAIT_TIMEOUT_500us

WAIT_TIMEOUT_500us integer := 500000 / STABLE_CLOCK_PERIOD
Constant

Definition at line 135 of file Gtp7TxRst.vhd.

◆ WAIT_1us_cycles

WAIT_1us_cycles integer := 1000 / STABLE_CLOCK_PERIOD
Constant

Definition at line 136 of file Gtp7TxRst.vhd.

◆ WAIT_1us

WAIT_1us integer := WAIT_1us_cycles + 10
Constant

Definition at line 137 of file Gtp7TxRst.vhd.

◆ soft_reset_sync

soft_reset_sync std_logic
Signal

Definition at line 139 of file Gtp7TxRst.vhd.

◆ init_wait_count

init_wait_count integer range 0 to WAIT_MAX := 0
Signal

Definition at line 141 of file Gtp7TxRst.vhd.

◆ init_wait_done

init_wait_done std_logic := ' 0 '
Signal

Definition at line 142 of file Gtp7TxRst.vhd.

◆ pll_reset_asserted

pll_reset_asserted std_logic := ' 0 '
Signal

Definition at line 143 of file Gtp7TxRst.vhd.

◆ tx_fsm_reset_done_int

tx_fsm_reset_done_int std_logic := ' 0 '
Signal

Definition at line 145 of file Gtp7TxRst.vhd.

◆ tx_fsm_reset_done_int_s2

tx_fsm_reset_done_int_s2 std_logic := ' 0 '
Signal

Definition at line 146 of file Gtp7TxRst.vhd.

◆ tx_fsm_reset_done_int_s3

tx_fsm_reset_done_int_s3 std_logic := ' 0 '
Signal

Definition at line 147 of file Gtp7TxRst.vhd.

◆ txresetdone_s2

txresetdone_s2 std_logic := ' 0 '
Signal

Definition at line 149 of file Gtp7TxRst.vhd.

◆ txresetdone_s3

txresetdone_s3 std_logic := ' 0 '
Signal

Definition at line 150 of file Gtp7TxRst.vhd.

◆ MAX_RETRIES

MAX_RETRIES integer := 2 ** RETRY_COUNTER_BITWIDTH - 1
Constant

Definition at line 152 of file Gtp7TxRst.vhd.

◆ retry_counter_int

retry_counter_int integer range 0 to MAX_RETRIES
Signal

Definition at line 153 of file Gtp7TxRst.vhd.

◆ time_out_counter

time_out_counter integer range 0 to WAIT_TIMEOUT_2ms := 0
Signal

Definition at line 154 of file Gtp7TxRst.vhd.

◆ count_1us

count_1us integer range 0 to WAIT_1us := 0
Signal

Definition at line 155 of file Gtp7TxRst.vhd.

◆ reset_time_out

reset_time_out std_logic := ' 0 '
Signal

Definition at line 157 of file Gtp7TxRst.vhd.

◆ count_1us_done

count_1us_done std_logic := ' 0 '
Signal

Definition at line 158 of file Gtp7TxRst.vhd.

◆ time_out_2ms

time_out_2ms std_logic := ' 0 '
Signal

Definition at line 159 of file Gtp7TxRst.vhd.

◆ time_tlock_max

time_tlock_max std_logic := ' 0 '
Signal

Definition at line 160 of file Gtp7TxRst.vhd.

◆ time_out_500us

time_out_500us std_logic := ' 0 '
Signal

Definition at line 161 of file Gtp7TxRst.vhd.

◆ mmcm_lock_count

mmcm_lock_count integer range 0 to MMCM_LOCK_CNT_MAX - 1 := 0
Signal

Definition at line 163 of file Gtp7TxRst.vhd.

◆ mmcm_lock_int

mmcm_lock_int std_logic := ' 0 '
Signal

Definition at line 164 of file Gtp7TxRst.vhd.

◆ mmcm_lock_i

mmcm_lock_i std_logic := ' 0 '
Signal

Definition at line 165 of file Gtp7TxRst.vhd.

◆ mmcm_lock_reclocked

mmcm_lock_reclocked std_logic := ' 0 '
Signal

Definition at line 166 of file Gtp7TxRst.vhd.

◆ run_phase_alignment_int

run_phase_alignment_int std_logic := ' 0 '
Signal

Definition at line 168 of file Gtp7TxRst.vhd.

◆ run_phase_alignment_int_s2

run_phase_alignment_int_s2 std_logic := ' 0 '
Signal

Definition at line 169 of file Gtp7TxRst.vhd.

◆ run_phase_alignment_int_s3

run_phase_alignment_int_s3 std_logic := ' 0 '
Signal

Definition at line 170 of file Gtp7TxRst.vhd.

◆ MAX_WAIT_BYPASS

MAX_WAIT_BYPASS integer := 45824
Constant

Definition at line 171 of file Gtp7TxRst.vhd.

◆ wait_bypass_count

wait_bypass_count integer range 0 to MAX_WAIT_BYPASS - 1
Signal

Definition at line 173 of file Gtp7TxRst.vhd.

◆ time_out_wait_bypass

time_out_wait_bypass std_logic := ' 0 '
Signal

Definition at line 174 of file Gtp7TxRst.vhd.

◆ time_out_wait_bypass_s2

time_out_wait_bypass_s2 std_logic := ' 0 '
Signal

Definition at line 175 of file Gtp7TxRst.vhd.

◆ time_out_wait_bypass_s3

time_out_wait_bypass_s3 std_logic := ' 0 '
Signal

Definition at line 176 of file Gtp7TxRst.vhd.

◆ txuserrdy_i

txuserrdy_i std_logic := ' 0 '
Signal

Definition at line 177 of file Gtp7TxRst.vhd.

◆ refclk_lost

refclk_lost std_logic
Signal

Definition at line 178 of file Gtp7TxRst.vhd.

◆ gttxreset_i

gttxreset_i std_logic := ' 0 '
Signal

Definition at line 179 of file Gtp7TxRst.vhd.

◆ txpmaresetdone_i

txpmaresetdone_i std_logic := ' 0 '
Signal

Definition at line 180 of file Gtp7TxRst.vhd.

◆ txpmaresetdone_sync

txpmaresetdone_sync std_logic
Signal

Definition at line 181 of file Gtp7TxRst.vhd.

◆ pll0lock_sync

pll0lock_sync std_logic := ' 0 '
Signal

Definition at line 183 of file Gtp7TxRst.vhd.

◆ pll1lock_sync

pll1lock_sync std_logic := ' 0 '
Signal

Definition at line 184 of file Gtp7TxRst.vhd.

◆ pll0lock_prev

pll0lock_prev std_logic := ' 0 '
Signal

Definition at line 185 of file Gtp7TxRst.vhd.

◆ pll1lock_prev

pll1lock_prev std_logic := ' 0 '
Signal

Definition at line 186 of file Gtp7TxRst.vhd.

◆ pll0lock_ris_edge

pll0lock_ris_edge std_logic := ' 0 '
Signal

Definition at line 187 of file Gtp7TxRst.vhd.

◆ pll1lock_ris_edge

pll1lock_ris_edge std_logic := ' 0 '
Signal

Definition at line 188 of file Gtp7TxRst.vhd.

◆ sync_txuserrdy

sync_txuserrdy Synchronizer
Instantiation

Definition at line 214 of file Gtp7TxRst.vhd.

◆ sync_pmaresetdone

sync_pmaresetdone Synchronizer
Instantiation

Definition at line 220 of file Gtp7TxRst.vhd.

◆ sync_soft_reset

sync_soft_reset Synchronizer
Instantiation

Definition at line 274 of file Gtp7TxRst.vhd.

◆ sync_run_phase_alignment_int

sync_run_phase_alignment_int Synchronizer
Instantiation

Definition at line 280 of file Gtp7TxRst.vhd.

◆ sync_tx_fsm_reset_done_int

sync_tx_fsm_reset_done_int Synchronizer
Instantiation

Definition at line 286 of file Gtp7TxRst.vhd.

◆ sync_txresetdone

sync_txresetdone Synchronizer
Instantiation

Definition at line 301 of file Gtp7TxRst.vhd.

◆ sync_time_out_wait_bypass

sync_time_out_wait_bypass Synchronizer
Instantiation

Definition at line 307 of file Gtp7TxRst.vhd.

◆ sync_mmcm_lock_reclocked

sync_mmcm_lock_reclocked Synchronizer
Instantiation

Definition at line 313 of file Gtp7TxRst.vhd.

◆ sync_pll0lock

sync_pll0lock Synchronizer
Instantiation

Definition at line 332 of file Gtp7TxRst.vhd.

◆ sync_pll1lock

sync_pll1lock Synchronizer
Instantiation

Definition at line 338 of file Gtp7TxRst.vhd.

The documentation for this class was generated from the following file: