Gtp7TxRst Entity Reference

Inheritance diagram for Gtp7TxRst:

Collaboration diagram for Gtp7TxRst:

Entities
RTL	architecture

Libraries
IEEE

Use Clauses
STD_LOGIC_1164
NUMERIC_STD

Generics
TPD_G	time := 1 ns
STABLE_CLOCK_PERIOD	integer range 4 to 20 := 8
RETRY_COUNTER_BITWIDTH	integer range 2 to 8 := 8
TX_PLL0_USED	boolean := false

Ports
STABLE_CLOCK	in std_logic
TXUSERCLK	in std_logic
SOFT_RESET	in std_logic
TXPMARESETDONE	in std_logic
TXOUTCLK	in std_logic
PLL0REFCLKLOST	in std_logic
PLL1REFCLKLOST	in std_logic
PLL0LOCK	in std_logic
PLL1LOCK	in std_logic
TXRESETDONE	in std_logic
MMCM_LOCK	in std_logic
GTTXRESET	out std_logic := ' 0 '
MMCM_RESET	out std_logic := ' 1 '
PLL0_RESET	out std_logic := ' 0 '
PLL1_RESET	out std_logic := ' 0 '
TX_FSM_RESET_DONE	out std_logic
TXUSERRDY	out std_logic := ' 0 '
RUN_PHALIGNMENT	out std_logic := ' 0 '
RESET_PHALIGNMENT	out std_logic := ' 0 '
PHALIGNMENT_DONE	in std_logic
RETRY_COUNTER	out std_logic_vector ( RETRY_COUNTER_BITWIDTH - 1 downto 0 ) := ( others = > ' 0 ' )

Detailed Description

See also

entity

Definition at line 76 of file Gtp7TxRst.vhd.

Member Data Documentation

TPD_G

TPD_G time := 1 ns

Generic

Definition at line 78 of file Gtp7TxRst.vhd.

STABLE_CLOCK_PERIOD

STABLE_CLOCK_PERIOD integer range 4 to 20 := 8

Generic

Definition at line 79 of file Gtp7TxRst.vhd.

RETRY_COUNTER_BITWIDTH

RETRY_COUNTER_BITWIDTH integer range 2 to 8 := 8

Generic

Definition at line 80 of file Gtp7TxRst.vhd.

TX_PLL0_USED

TX_PLL0_USED boolean := false

Generic

Definition at line 82 of file Gtp7TxRst.vhd.

STABLE_CLOCK

STABLE_CLOCK in std_logic

Port

Definition at line 84 of file Gtp7TxRst.vhd.

TXUSERCLK

TXUSERCLK in std_logic

Port

Definition at line 86 of file Gtp7TxRst.vhd.

SOFT_RESET

SOFT_RESET in std_logic

Port

Definition at line 87 of file Gtp7TxRst.vhd.

TXPMARESETDONE

TXPMARESETDONE in std_logic

Port

Definition at line 88 of file Gtp7TxRst.vhd.

TXOUTCLK

TXOUTCLK in std_logic

Port

Definition at line 89 of file Gtp7TxRst.vhd.

PLL0REFCLKLOST

PLL0REFCLKLOST in std_logic

Port

Definition at line 90 of file Gtp7TxRst.vhd.

PLL1REFCLKLOST

PLL1REFCLKLOST in std_logic

Port

Definition at line 91 of file Gtp7TxRst.vhd.

PLL0LOCK

PLL0LOCK in std_logic

Port

Definition at line 92 of file Gtp7TxRst.vhd.

PLL1LOCK

PLL1LOCK in std_logic

Port

Definition at line 93 of file Gtp7TxRst.vhd.

TXRESETDONE

TXRESETDONE in std_logic

Port

Definition at line 94 of file Gtp7TxRst.vhd.

MMCM_LOCK

MMCM_LOCK in std_logic

Port

Definition at line 95 of file Gtp7TxRst.vhd.

GTTXRESET

GTTXRESET out std_logic := ' 0 '

Port

Definition at line 96 of file Gtp7TxRst.vhd.

MMCM_RESET

MMCM_RESET out std_logic := ' 1 '

Port

Definition at line 97 of file Gtp7TxRst.vhd.

PLL0_RESET

PLL0_RESET out std_logic := ' 0 '

Port

Definition at line 98 of file Gtp7TxRst.vhd.

PLL1_RESET

PLL1_RESET out std_logic := ' 0 '

Port

Definition at line 99 of file Gtp7TxRst.vhd.

TX_FSM_RESET_DONE

TX_FSM_RESET_DONE out std_logic

Port

Definition at line 100 of file Gtp7TxRst.vhd.

TXUSERRDY

TXUSERRDY out std_logic := ' 0 '

Port

Definition at line 101 of file Gtp7TxRst.vhd.

RUN_PHALIGNMENT

RUN_PHALIGNMENT out std_logic := ' 0 '

Port

Definition at line 102 of file Gtp7TxRst.vhd.

RESET_PHALIGNMENT

RESET_PHALIGNMENT out std_logic := ' 0 '

Port

Definition at line 103 of file Gtp7TxRst.vhd.

PHALIGNMENT_DONE

PHALIGNMENT_DONE in std_logic

Port

Definition at line 104 of file Gtp7TxRst.vhd.

RETRY_COUNTER

RETRY_COUNTER out std_logic_vector ( RETRY_COUNTER_BITWIDTH - 1 downto 0 ) := ( others = > ' 0 ' )

Port

Definition at line 108 of file Gtp7TxRst.vhd.

IEEE

IEEE

Library

Definition at line 70 of file Gtp7TxRst.vhd.

STD_LOGIC_1164

STD_LOGIC_1164

Package

Definition at line 71 of file Gtp7TxRst.vhd.

NUMERIC_STD

NUMERIC_STD

Package

Definition at line 72 of file Gtp7TxRst.vhd.

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The documentation for this class was generated from the following file:

• xilinx/7Series/gtp7/rtl/Gtp7TxRst.vhd