SURF  1.0
mapping Architecture Reference

Functions

string   GetFifoType ( d_width: in in integer , a_width: in in integer )

Processes

PROCESS_24  ( wr_clk )
PROCESS_25  ( wr_clk )
PROCESS_26  ( rd_clk )

Constants

FIFO_LENGTH_C  integer := ( ( 2 ** ADDR_WIDTH_G ) - 1 )
FIFO_SIZE_C  string := GetFifoType ( DATA_WIDTH_G , ADDR_WIDTH_G )

Signals

wrAddrPntr  slv ( ADDR_WIDTH_G - 1 downto 0 ) := ( others = > ' 0 ' )
rdAddrPntr  slv ( ADDR_WIDTH_G - 1 downto 0 ) := ( others = > ' 0 ' )
wrGrayPntr  slv ( ADDR_WIDTH_G - 1 downto 0 ) := ( others = > ' 0 ' )
rdGrayPntr  slv ( ADDR_WIDTH_G - 1 downto 0 ) := ( others = > ' 0 ' )
wcnt  slv ( ADDR_WIDTH_G - 1 downto 0 ) := ( others = > ' 0 ' )
rcnt  slv ( ADDR_WIDTH_G - 1 downto 0 ) := ( others = > ' 0 ' )
buildInFull  sl := ' 0 '
buildInEmpty  sl := ' 0 '
progEmpty  sl := ' 0 '
progFull  sl := ' 0 '
fifoWrRst  sl := ' 0 '
fifoRdRst  sl := ' 0 '
rstEmpty  sl := ' 0 '
rstFull  sl := ' 0 '
wrEn  sl := ' 0 '
sValid  sl := ' 0 '
sRdEn  sl := ' 0 '
dummyWRERR  sl := ' 0 '
dummyALMOSTFULL  sl := ' 0 '
dummyALMOSTEMPTY  sl := ' 0 '
rstDet  sl := ' 0 '
dataOut  slv ( DATA_WIDTH_G - 1 downto 0 )

Attributes

use_dsp48  string
use_dsp48  wcnt : signal is USE_DSP48_G
use_dsp48  rcnt : signal is USE_DSP48_G

Instantiations

rstsync_full  RstSync <Entity RstSync>
synchronizeredge_full  SynchronizerEdge <Entity SynchronizerEdge>
rstsync_fifo  RstSync <Entity RstSync>
rstsync_rd  RstSync <Entity RstSync>
rstsync_empty  RstSync <Entity RstSync>
fifo_dualclock_macro_inst  fifo_dualclock_macro
synchronizervector_0  SynchronizerVector <Entity SynchronizerVector>
synchronizervector_1  SynchronizerVector <Entity SynchronizerVector>
fifooutputpipeline_inst  FifoOutputPipeline <Entity FifoOutputPipeline>

Detailed Description

Definition at line 72 of file FifoAsyncBuiltIn.vhd.

Member Function Documentation

◆ GetFifoType()

string GetFifoType (   d_width in in integer ,
  a_width in in integer  
)
Function

Definition at line 74 of file FifoAsyncBuiltIn.vhd.

◆ PROCESS_24()

PROCESS_24 (   wr_clk)

Definition at line 274 of file FifoAsyncBuiltIn.vhd.

◆ PROCESS_25()

PROCESS_25 (   wr_clk  
)
Process

Definition at line 284 of file FifoAsyncBuiltIn.vhd.

◆ PROCESS_26()

PROCESS_26 (   rd_clk)

Definition at line 331 of file FifoAsyncBuiltIn.vhd.

Member Data Documentation

◆ FIFO_LENGTH_C

FIFO_LENGTH_C integer := ( ( 2 ** ADDR_WIDTH_G ) - 1 )
Constant

Definition at line 99 of file FifoAsyncBuiltIn.vhd.

◆ FIFO_SIZE_C

FIFO_SIZE_C string := GetFifoType ( DATA_WIDTH_G , ADDR_WIDTH_G )
Constant

Definition at line 100 of file FifoAsyncBuiltIn.vhd.

◆ wrAddrPntr

wrAddrPntr slv ( ADDR_WIDTH_G - 1 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 107 of file FifoAsyncBuiltIn.vhd.

◆ rdAddrPntr

rdAddrPntr slv ( ADDR_WIDTH_G - 1 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 107 of file FifoAsyncBuiltIn.vhd.

◆ wrGrayPntr

wrGrayPntr slv ( ADDR_WIDTH_G - 1 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 107 of file FifoAsyncBuiltIn.vhd.

◆ rdGrayPntr

rdGrayPntr slv ( ADDR_WIDTH_G - 1 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 107 of file FifoAsyncBuiltIn.vhd.

◆ wcnt

wcnt slv ( ADDR_WIDTH_G - 1 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 107 of file FifoAsyncBuiltIn.vhd.

◆ rcnt

rcnt slv ( ADDR_WIDTH_G - 1 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 107 of file FifoAsyncBuiltIn.vhd.

◆ buildInFull

buildInFull sl := ' 0 '
Signal

Definition at line 123 of file FifoAsyncBuiltIn.vhd.

◆ buildInEmpty

buildInEmpty sl := ' 0 '
Signal

Definition at line 123 of file FifoAsyncBuiltIn.vhd.

◆ progEmpty

progEmpty sl := ' 0 '
Signal

Definition at line 123 of file FifoAsyncBuiltIn.vhd.

◆ progFull

progFull sl := ' 0 '
Signal

Definition at line 123 of file FifoAsyncBuiltIn.vhd.

◆ fifoWrRst

fifoWrRst sl := ' 0 '
Signal

Definition at line 123 of file FifoAsyncBuiltIn.vhd.

◆ fifoRdRst

fifoRdRst sl := ' 0 '
Signal

Definition at line 123 of file FifoAsyncBuiltIn.vhd.

◆ rstEmpty

rstEmpty sl := ' 0 '
Signal

Definition at line 123 of file FifoAsyncBuiltIn.vhd.

◆ rstFull

rstFull sl := ' 0 '
Signal

Definition at line 123 of file FifoAsyncBuiltIn.vhd.

◆ wrEn

wrEn sl := ' 0 '
Signal

Definition at line 123 of file FifoAsyncBuiltIn.vhd.

◆ sValid

sValid sl := ' 0 '
Signal

Definition at line 123 of file FifoAsyncBuiltIn.vhd.

◆ sRdEn

sRdEn sl := ' 0 '
Signal

Definition at line 123 of file FifoAsyncBuiltIn.vhd.

◆ dummyWRERR

dummyWRERR sl := ' 0 '
Signal

Definition at line 123 of file FifoAsyncBuiltIn.vhd.

◆ dummyALMOSTFULL

dummyALMOSTFULL sl := ' 0 '
Signal

Definition at line 123 of file FifoAsyncBuiltIn.vhd.

◆ dummyALMOSTEMPTY

dummyALMOSTEMPTY sl := ' 0 '
Signal

Definition at line 123 of file FifoAsyncBuiltIn.vhd.

◆ rstDet

rstDet sl := ' 0 '
Signal

Definition at line 123 of file FifoAsyncBuiltIn.vhd.

◆ dataOut

dataOut slv ( DATA_WIDTH_G - 1 downto 0 )
Signal

Definition at line 125 of file FifoAsyncBuiltIn.vhd.

◆ use_dsp48 [1/3]

use_dsp48 string
Attribute

Definition at line 128 of file FifoAsyncBuiltIn.vhd.

◆ use_dsp48 [2/3]

use_dsp48 wcnt : signal is USE_DSP48_G
Attribute

Definition at line 129 of file FifoAsyncBuiltIn.vhd.

◆ use_dsp48 [3/3]

use_dsp48 rcnt : signal is USE_DSP48_G
Attribute

Definition at line 130 of file FifoAsyncBuiltIn.vhd.

◆ rstsync_full

rstsync_full RstSync
Instantiation

Definition at line 183 of file FifoAsyncBuiltIn.vhd.

◆ synchronizeredge_full

synchronizeredge_full SynchronizerEdge
Instantiation

Definition at line 191 of file FifoAsyncBuiltIn.vhd.

◆ rstsync_fifo

rstsync_fifo RstSync
Instantiation

Definition at line 200 of file FifoAsyncBuiltIn.vhd.

◆ rstsync_rd

rstsync_rd RstSync
Instantiation

Definition at line 210 of file FifoAsyncBuiltIn.vhd.

◆ rstsync_empty

rstsync_empty RstSync
Instantiation

Definition at line 220 of file FifoAsyncBuiltIn.vhd.

◆ fifo_dualclock_macro_inst

fifo_dualclock_macro_inst fifo_dualclock_macro
Instantiation

Definition at line 245 of file FifoAsyncBuiltIn.vhd.

◆ synchronizervector_0

synchronizervector_0 SynchronizerVector
Instantiation

Definition at line 261 of file FifoAsyncBuiltIn.vhd.

◆ synchronizervector_1

synchronizervector_1 SynchronizerVector
Instantiation

Definition at line 307 of file FifoAsyncBuiltIn.vhd.

◆ fifooutputpipeline_inst

fifooutputpipeline_inst FifoOutputPipeline
Instantiation

Definition at line 357 of file FifoAsyncBuiltIn.vhd.


The documentation for this class was generated from the following file: