SURF  1.0
Generics | Ports | Libraries | Use Clauses
Dsp48Comparator4x12b Entity Reference
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Entities

mapping  architecture
 

Libraries

ieee 
unisim 

Use Clauses

std_logic_1164 
StdRtlPkg  Package <StdRtlPkg>
vcomponents 

Generics

TPD_G  time := 1 ns
EN_GREATER_EQUAL_G  boolean := false

Ports

polarity   in sl := ' 0 '
dataIn   in Slv12Array ( 0 to 3 )
threshIn   in Slv12Array ( 0 to 3 )
compOut   out slv ( 3 downto 0 )
clk   in sl
rst   in sl := ' 0 '

Detailed Description

See also
entity

Definition at line 28 of file Dsp48Comparator4x12b.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 30 of file Dsp48Comparator4x12b.vhd.

◆ EN_GREATER_EQUAL_G

EN_GREATER_EQUAL_G boolean := false
Generic

Definition at line 31 of file Dsp48Comparator4x12b.vhd.

◆ polarity

polarity in sl := ' 0 '
Port

Definition at line 34 of file Dsp48Comparator4x12b.vhd.

◆ dataIn

dataIn in Slv12Array ( 0 to 3 )
Port

Definition at line 35 of file Dsp48Comparator4x12b.vhd.

◆ threshIn

threshIn in Slv12Array ( 0 to 3 )
Port

Definition at line 36 of file Dsp48Comparator4x12b.vhd.

◆ compOut

compOut out slv ( 3 downto 0 )
Port

Definition at line 38 of file Dsp48Comparator4x12b.vhd.

◆ clk

clk in sl
Port

Definition at line 40 of file Dsp48Comparator4x12b.vhd.

◆ rst

rst in sl := ' 0 '
Port

Definition at line 41 of file Dsp48Comparator4x12b.vhd.

◆ ieee

ieee
Library

Definition at line 18 of file Dsp48Comparator4x12b.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 19 of file Dsp48Comparator4x12b.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 21 of file Dsp48Comparator4x12b.vhd.

◆ unisim

unisim
Library

Definition at line 23 of file Dsp48Comparator4x12b.vhd.

◆ vcomponents

vcomponents
Package

Definition at line 24 of file Dsp48Comparator4x12b.vhd.

The documentation for this class was generated from the following file: