SURF  1.0
structure Architecture Reference

Processes

comb  ( axisRst , pipeAxisSlaves , r , sAxisMaster )
seq  ( axisClk )

Constants

REG_INIT_C  RegType := ( slave = > AXI_STREAM_SLAVE_INIT_C , masters = > ( others = > AXI_STREAM_MASTER_INIT_C ) )

Signals

pipeAxisMasters  AxiStreamMasterArray ( NUM_MASTERS_G - 1 downto 0 )
pipeAxisSlaves  AxiStreamSlaveArray ( NUM_MASTERS_G - 1 downto 0 )
r  RegType := REG_INIT_C
rin  RegType

Records

RegType  
slave  AxiStreamSlaveType
masters  AxiStreamMasterArray ( NUM_MASTERS_G - 1 downto 0 )

Instantiations

u_pipeline  AxiStreamPipeline <Entity AxiStreamPipeline>

Detailed Description

Definition at line 50 of file AxiStreamDeMux.vhd.

Member Function Documentation

◆ comb()

comb (   axisRst ,
  pipeAxisSlaves ,
  r ,
  sAxisMaster  
)
Process

Definition at line 79 of file AxiStreamDeMux.vhd.

◆ seq()

seq (   axisClk)

Definition at line 156 of file AxiStreamDeMux.vhd.

Member Data Documentation

◆ RegType

RegType
Record

Definition at line 52 of file AxiStreamDeMux.vhd.

◆ slave

Definition at line 53 of file AxiStreamDeMux.vhd.

◆ masters

masters AxiStreamMasterArray ( NUM_MASTERS_G - 1 downto 0 )
Record

Definition at line 54 of file AxiStreamDeMux.vhd.

◆ REG_INIT_C

Definition at line 57 of file AxiStreamDeMux.vhd.

◆ pipeAxisMasters

Definition at line 61 of file AxiStreamDeMux.vhd.

◆ pipeAxisSlaves

Definition at line 62 of file AxiStreamDeMux.vhd.

◆ r

r RegType := REG_INIT_C
Signal

Definition at line 64 of file AxiStreamDeMux.vhd.

◆ rin

rin RegType
Signal

Definition at line 65 of file AxiStreamDeMux.vhd.

◆ u_pipeline

u_pipeline AxiStreamPipeline
Instantiation

Definition at line 154 of file AxiStreamDeMux.vhd.


The documentation for this class was generated from the following file: