SURF  1.0
Pgp2bRxCell.vhd
Go to the documentation of this file.
1 -------------------------------------------------------------------------------
2 -- File : Pgp2bRxCell.vhd
3 -- Company : SLAC National Accelerator Laboratory
4 -- Created : 2009-05-27
5 -- Last update: 2017-03-28
6 -------------------------------------------------------------------------------
7 -- Description:
8 -- Cell Receive interface module for the Pretty Good Protocol core.
9 -------------------------------------------------------------------------------
10 -- This file is part of 'SLAC Firmware Standard Library'.
11 -- It is subject to the license terms in the LICENSE.txt file found in the
12 -- top-level directory of this distribution and at:
13 -- https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html.
14 -- No part of 'SLAC Firmware Standard Library', including this file,
15 -- may be copied, modified, propagated, or distributed except according to
16 -- the terms contained in the LICENSE.txt file.
17 -------------------------------------------------------------------------------
18 
19 LIBRARY ieee;
20 use ieee.std_logic_1164.all;
21 use ieee.std_logic_arith.all;
22 use ieee.std_logic_unsigned.all;
23 use work.StdRtlPkg.all;
24 use work.Pgp2bPkg.all;
25 
26 --! @see entity
27  --! @ingroup protocols_pgp_pgp2b_core
28 entity Pgp2bRxCell is
29  generic (
30  TPD_G : time := 1 ns;
31  RX_LANE_CNT_G : integer range 1 to 2 := 1; -- Number of receive lanes, 1-2
32  EN_SHORT_CELLS_G : integer := 1; -- Enable short non-EOF cells
33  PAYLOAD_CNT_TOP_G : integer := 7 -- Top bit for payload counter
34  );
35  port (
36 
37  -- System clock, reset & control
38  pgpRxClkEn : in sl := '1'; -- Master clock Enable
39  pgpRxClk : in sl; -- Master clock
40  pgpRxClkRst : in sl; -- Synchronous reset input
41 
42  -- Link flush
43  pgpRxFlush : in sl; -- Flush the link
44 
45  -- Link is ready
46  pgpRxLinkReady : in sl; -- Local side has link
47 
48  -- Cell Error, one pulse per error
49  pgpRxCellError : out sl; -- A cell error has occured
50 
51  -- Interface to PHY Logic
52  cellRxPause : in sl; -- Cell data pause
53  cellRxSOC : in sl; -- Cell data start of cell
54  cellRxSOF : in sl; -- Cell data start of frame
55  cellRxEOC : in sl; -- Cell data end of cell
56  cellRxEOF : in sl; -- Cell data end of frame
57  cellRxEOFE : in sl; -- Cell data end of frame error
58  cellRxData : in slv(RX_LANE_CNT_G*16-1 downto 0); -- Cell data data
59 
60  -- Common Frame Receive Interface For All VCs
61  vcFrameRxSOF : out sl; -- PGP frame data start of frame
62  vcFrameRxEOF : out sl; -- PGP frame data end of frame
63  vcFrameRxEOFE : out sl; -- PGP frame data error
64  vcFrameRxData : out slv(RX_LANE_CNT_G*16-1 downto 0); -- PGP frame data
65 
66  -- Frame Receive Interface, VC 0
67  vc0FrameRxValid : out sl; -- PGP frame data is valid
68  vc0RemAlmostFull : out sl; -- Remote buffer almost full
69  vc0RemOverflow : out sl; -- Remote buffer overflow
70 
71  -- Frame Receive Interface, VC 1
72  vc1FrameRxValid : out sl; -- PGP frame data is valid
73  vc1RemAlmostFull : out sl; -- Remote buffer almost full
74  vc1RemOverflow : out sl; -- Remote buffer overflow
75 
76  -- Frame Receive Interface, VC 2
77  vc2FrameRxValid : out sl; -- PGP frame data is valid
78  vc2RemAlmostFull : out sl; -- Remote buffer almost full
79  vc2RemOverflow : out sl; -- Remote buffer overflow
80 
81  -- Frame Receive Interface, VC 3
82  vc3FrameRxValid : out sl; -- PGP frame data is valid
83  vc3RemAlmostFull : out sl; -- Remote buffer almost full
84  vc3RemOverflow : out sl; -- Remote buffer overflow
85 
86  -- Receive CRC Interface
87  crcRxIn : out slv(RX_LANE_CNT_G*16-1 downto 0); -- Receive data for CRC
88  crcRxInit : out sl; -- Receive CRC value init
89  crcRxValid : out sl; -- Receive data for CRC is valid
90  crcRxOut : in slv(31 downto 0) -- Receive calculated CRC value
91  );
92 
93 end Pgp2bRxCell;
94 
95 
96 -- Define architecture
97 architecture Pgp2bRxCell of Pgp2bRxCell is
98 
99  -- Local Signals
100  signal dly0SOC : sl;
101  signal dly0SOF : sl;
102  signal dly0EOC : sl;
103  signal dly0EOF : sl;
104  signal dly0EOFE : sl;
105  signal dly0Data : slv(RX_LANE_CNT_G*16-1 downto 0);
106  signal dly1SOC : sl;
107  signal dly1SOF : sl;
108  signal dly1EOC : sl;
109  signal dly1EOF : sl;
110  signal dly1EOFE : sl;
111  signal dly1Data : slv(RX_LANE_CNT_G*16-1 downto 0);
112  signal dly2SOC : sl;
113  signal dly2SOF : sl;
114  signal dly2EOC : sl;
115  signal dly2EOF : sl;
116  signal dly2EOFE : sl;
117  signal dly2Data : slv(RX_LANE_CNT_G*16-1 downto 0);
118  signal dly3SOC : sl;
119  signal dly3SOF : sl;
120  signal dly3EOC : sl;
121  signal dly3EOF : sl;
122  signal dly3EOFE : sl;
123  signal dly3Data : slv(RX_LANE_CNT_G*16-1 downto 0);
124  signal dly4SOC : sl;
125  signal dly4SOF : sl;
126  signal dly4EOC : sl;
127  signal dly4EOF : sl;
128  signal dly4EOFE : sl;
129  signal dly4Data : slv(RX_LANE_CNT_G*16-1 downto 0);
130  signal dly5SOC : sl;
131  signal dly5SOF : sl;
132  signal dly5EOC : sl;
133  signal dly5EOF : sl;
134  signal dly5EOFE : sl;
135  signal dly5Data : slv(RX_LANE_CNT_G*16-1 downto 0);
136  signal dly6SOC : sl;
137  signal dly6SOF : sl;
138  signal dly6EOC : sl;
139  signal dly6EOF : sl;
140  signal dly6EOFE : sl;
141  signal dly6Data : slv(RX_LANE_CNT_G*16-1 downto 0);
142  signal dly7SOC : sl;
143  signal dly7SOF : sl;
144  signal dly7EOC : sl;
145  signal dly7EOF : sl;
146  signal dly7EOFE : sl;
147  signal dly7Data : slv(RX_LANE_CNT_G*16-1 downto 0);
148  signal intCrcRxValid : sl;
149  signal crcNotZero : sl;
150  signal linkDownCnt : slv(4 downto 0);
151  signal compSOC : sl;
152  signal compData : slv(RX_LANE_CNT_G*16-1 downto 0);
153  signal detSOC : sl;
154  signal detSOF : sl;
155  signal outData : slv(RX_LANE_CNT_G*16-1 downto 0);
156  signal detEOC : sl;
157  signal detEOF : sl;
158  signal detEOFE : sl;
159  signal inCellEn : sl;
160  signal nxtCellEn : sl;
161  signal inCellSerErr : sl;
162  signal inCellSOF : sl;
163  signal inCellEOC : sl;
164  signal inCellEOF : sl;
165  signal inCellEOFE : sl;
166  signal inCellCnt : slv(PAYLOAD_CNT_TOP_G downto 0);
167  signal vcInFrame : slv(3 downto 0);
168  signal currVc : slv(1 downto 0);
169  signal serErr : sl;
170  signal vc0Serial : slv(5 downto 0);
171  signal vc0Valid : sl;
172  signal vc1Serial : slv(5 downto 0);
173  signal vc1Valid : sl;
174  signal vc2Serial : slv(5 downto 0);
175  signal vc2Valid : sl;
176  signal vc3Serial : slv(5 downto 0);
177  signal vc3Valid : sl;
178  signal abortVc : slv(1 downto 0);
179  signal abortEn : sl;
180  signal intCellError : sl;
181  signal dlyCellError : sl;
182 
183 begin
184 
185  -- Delay stages to line up data with CRC calculation
186  process ( pgpRxClk ) begin
187  if rising_edge(pgpRxClk) then
188  if pgpRxClkRst = '1' then
189  dly0SOC <= '0' after TPD_G;
190  dly0SOF <= '0' after TPD_G;
191  dly0EOC <= '0' after TPD_G;
192  dly0EOF <= '0' after TPD_G;
193  dly0EOFE <= '0' after TPD_G;
194  dly0Data <= (others=>'0') after TPD_G;
195  dly1SOC <= '0' after TPD_G;
196  dly1SOF <= '0' after TPD_G;
197  dly1EOC <= '0' after TPD_G;
198  dly1EOF <= '0' after TPD_G;
199  dly1EOFE <= '0' after TPD_G;
200  dly1Data <= (others=>'0') after TPD_G;
201  dly2SOC <= '0' after TPD_G;
202  dly2SOF <= '0' after TPD_G;
203  dly2EOC <= '0' after TPD_G;
204  dly2EOF <= '0' after TPD_G;
205  dly2EOFE <= '0' after TPD_G;
206  dly2Data <= (others=>'0') after TPD_G;
207  dly3SOC <= '0' after TPD_G;
208  dly3SOF <= '0' after TPD_G;
209  dly3EOC <= '0' after TPD_G;
210  dly3EOF <= '0' after TPD_G;
211  dly3EOFE <= '0' after TPD_G;
212  dly3Data <= (others=>'0') after TPD_G;
213  dly4SOC <= '0' after TPD_G;
214  dly4SOF <= '0' after TPD_G;
215  dly4EOC <= '0' after TPD_G;
216  dly4EOF <= '0' after TPD_G;
217  dly4EOFE <= '0' after TPD_G;
218  dly4Data <= (others=>'0') after TPD_G;
219  dly5SOC <= '0' after TPD_G;
220  dly5SOF <= '0' after TPD_G;
221  dly5EOC <= '0' after TPD_G;
222  dly5EOF <= '0' after TPD_G;
223  dly5EOFE <= '0' after TPD_G;
224  dly5Data <= (others=>'0') after TPD_G;
225  dly6SOC <= '0' after TPD_G;
226  dly6SOF <= '0' after TPD_G;
227  dly6EOC <= '0' after TPD_G;
228  dly6EOF <= '0' after TPD_G;
229  dly6EOFE <= '0' after TPD_G;
230  dly6Data <= (others=>'0') after TPD_G;
231  dly7SOC <= '0' after TPD_G;
232  dly7SOF <= '0' after TPD_G;
233  dly7EOC <= '0' after TPD_G;
234  dly7EOF <= '0' after TPD_G;
235  dly7EOFE <= '0' after TPD_G;
236  dly7Data <= (others=>'0') after TPD_G;
237  intCrcRxValid <= '0' after TPD_G;
238  elsif pgpRxClkEn = '1' then
239  -- Shift when not paused
240  if cellRxPause = '0' then
241 
242  -- Delay stage 0
243  dly0SOC <= cellRxSOC after TPD_G;
244  dly0SOF <= cellRxSOF after TPD_G;
245  dly0EOC <= cellRxEOC after TPD_G;
246  dly0EOF <= cellRxEOF after TPD_G;
247  dly0EOFE <= cellRxEOFE after TPD_G;
248  dly0Data <= cellRxData after TPD_G;
249 
250  -- Delay stage 1
251  dly1SOC <= dly0SOC after TPD_G;
252  dly1SOF <= dly0SOF after TPD_G;
253  dly1EOC <= dly0EOC after TPD_G;
254  dly1EOF <= dly0EOF after TPD_G;
255  dly1EOFE <= dly0EOFE after TPD_G;
256  dly1Data <= dly0Data after TPD_G;
257 
258  -- Delay stage 2
259  dly2SOC <= dly1SOC after TPD_G;
260  dly2SOF <= dly1SOF after TPD_G;
261  dly2EOC <= dly1EOC after TPD_G;
262  dly2EOF <= dly1EOF after TPD_G;
263  dly2EOFE <= dly1EOFE after TPD_G;
264  dly2Data <= dly1Data after TPD_G;
265 
266  -- Delay stage 3
267  dly3SOC <= dly2SOC after TPD_G;
268  dly3SOF <= dly2SOF after TPD_G;
269  dly3EOC <= dly2EOC after TPD_G;
270  dly3EOF <= dly2EOF after TPD_G;
271  dly3EOFE <= dly2EOFE after TPD_G;
272  dly3Data <= dly2Data after TPD_G;
273 
274  -- Delay stage 4
275  dly4SOC <= dly3SOC after TPD_G;
276  dly4SOF <= dly3SOF after TPD_G;
277  dly4EOC <= dly3EOC after TPD_G;
278  dly4EOF <= dly3EOF after TPD_G;
279  dly4EOFE <= dly3EOFE after TPD_G;
280  dly4Data <= dly3Data after TPD_G;
281 
282  -- Delay stage 5
283  dly5SOC <= dly4SOC after TPD_G;
284  dly5SOF <= dly4SOF after TPD_G;
285  dly5EOC <= dly4EOC after TPD_G;
286  dly5EOF <= dly4EOF after TPD_G;
287  dly5EOFE <= dly4EOFE after TPD_G;
288  dly5Data <= dly4Data after TPD_G;
289 
290  -- Delay stage 6
291  dly6SOC <= dly5SOC after TPD_G;
292  dly6SOF <= dly5SOF after TPD_G;
293  dly6EOC <= dly5EOC after TPD_G;
294  dly6EOF <= dly5EOF after TPD_G;
295  dly6EOFE <= dly5EOFE after TPD_G;
296  dly6Data <= dly5Data after TPD_G;
297 
298  -- Delay stage 7
299  dly7SOC <= dly6SOC after TPD_G;
300  dly7SOF <= dly6SOF after TPD_G;
301  dly7EOC <= dly6EOC after TPD_G;
302  dly7EOF <= dly6EOF after TPD_G;
303  dly7EOFE <= dly6EOFE after TPD_G;
304  dly7Data <= dly6Data after TPD_G;
305 
306  -- CRC Enable & partial flag
307  if cellRxSOC = '1' then
308  intCrcRxValid <= '1' after TPD_G;
309  elsif cellRxEOC = '1' then
310  intCrcRxValid <= '0' after TPD_G;
311  end if;
312  end if;
313  end if;
314  end if;
315  end process;
316 
317 
318 
319  -- CRC Data Output, SOC field overwritten with zeros
320  GEN_CRC: for i in 0 to (RX_LANE_CNT_G-1) generate
321  process ( dly0SOC, dly0Data ) begin
322  if dly0SOC = '1' then
323  crcRxIn(i*16+7 downto i*16) <= (others=>'0');
324  else
325  crcRxIn(i*16+7 downto i*16) <= dly0Data(i*16+7 downto i*16);
326  end if;
327  crcRxIn(i*16+15 downto i*16+8) <= dly0Data(i*16+15 downto i*16+8);
328  end process;
329  end generate;
330 
331 
332  -- Output to CRC engine
333  crcRxInit <= dly0SOC;
334  crcRxValid <= intCrcRxValid and not cellRxPause;
335 
336 
337  -- Choose tap positions in delay chain
338 
339  -- Serial number compare position, detSOC - 1
340  compSOC <= dly6SOC;
341  compData <= dly6Data;
342 
343  -- SOC detect position,
344  detSOC <= dly7SOC;
345  detSOF <= dly7SOF;
346  outData <= dly7Data;
347 
348  -- EOC detect position, depends on lane count
349  -- detSOC - 4 when 1 lane, detSOC - 3 when multiple lanes
350  detEOC <= dly3EOC when RX_LANE_CNT_G = 1 else dly4EOC;
351  detEOF <= dly3EOF when RX_LANE_CNT_G = 1 else dly4EOF;
352  detEOFE <= dly3EOFE when RX_LANE_CNT_G = 1 else dly4EOFE;
353 
354 
355  -- Detect current VC, check cell serial number
356  process ( pgpRxClk ) begin
357  if rising_edge(pgpRxClk) then
358  if pgpRxClkRst = '1' then
359  currVc <= (others=>'0') after TPD_G;
360  serErr <= '0' after TPD_G;
361  vc0Serial <= (others=>'0') after TPD_G;
362  vc0Valid <= '0' after TPD_G;
363  vc1Serial <= (others=>'0') after TPD_G;
364  vc1Valid <= '0' after TPD_G;
365  vc2Serial <= (others=>'0') after TPD_G;
366  vc2Valid <= '0' after TPD_G;
367  vc3Serial <= (others=>'0') after TPD_G;
368  vc3Valid <= '0' after TPD_G;
369  elsif pgpRxClkEn = '1' then
370  -- Link is down, init counts
371  if pgpRxLinkReady = '0' then
372  currVc <= (others=>'0') after TPD_G;
373  serErr <= '0' after TPD_G;
374  vc0Serial <= (others=>'0') after TPD_G;
375  vc0Valid <= '0' after TPD_G;
376  vc1Serial <= (others=>'0') after TPD_G;
377  vc1Valid <= '0' after TPD_G;
378  vc2Serial <= (others=>'0') after TPD_G;
379  vc2Valid <= '0' after TPD_G;
380  vc3Serial <= (others=>'0') after TPD_G;
381  vc3Valid <= '0' after TPD_G;
382 
383  -- Pipeline enable
384  elsif cellRxPause = '0' then
385 
386  -- SOC for compare
387  if compSOC = '1' then
388 
389  -- Register VC value
390  currVc <= compData(15 downto 14) after TPD_G;
391 
392  -- Compare current count, store current count for future increment
393  case compData(15 downto 14) is
394 
395  -- VC 0
396  when "00" =>
397  if compData(13 downto 8) = vc0Serial then
398  serErr <= '0' after TPD_G;
399  else
400  vc0Serial <= compData(13 downto 8) after TPD_G;
401  serErr <= vc0Valid after TPD_G;
402  end if;
403  vc0Valid <= '1' after TPD_G;
404 
405  -- VC 1
406  when "01" =>
407  if compData(13 downto 8) = vc1Serial then
408  serErr <= '0' after TPD_G;
409  else
410  vc1Serial <= compData(13 downto 8) after TPD_G;
411  serErr <= vc1Valid after TPD_G;
412  end if;
413  vc1Valid <= '1' after TPD_G;
414 
415  -- VC 2
416  when "10" =>
417  if compData(13 downto 8) = vc2Serial then
418  serErr <= '0' after TPD_G;
419  else
420  vc2Serial <= compData(13 downto 8) after TPD_G;
421  serErr <= vc2Valid after TPD_G;
422  end if;
423  vc2Valid <= '1' after TPD_G;
424 
425  -- VC 3
426  when others =>
427  if compData(13 downto 8) = vc3Serial then
428  serErr <= '0' after TPD_G;
429  else
430  vc3Serial <= compData(13 downto 8) after TPD_G;
431  serErr <= vc3Valid after TPD_G;
432  end if;
433  vc3Valid <= '1' after TPD_G;
434  end case;
435 
436  -- SOC for increment
437  elsif detSOC = '1' then
438  case currVc is
439  when "00" => vc0Serial <= vc0Serial + 1 after TPD_G;
440  when "01" => vc1Serial <= vc1Serial + 1 after TPD_G;
441  when "10" => vc2Serial <= vc2Serial + 1 after TPD_G;
442  when others => vc3Serial <= vc3Serial + 1 after TPD_G;
443  end case;
444  end if;
445  end if;
446  end if;
447  end if;
448  end process;
449 
450 
451  -- Receive cell tracking
452  process ( pgpRxClk ) begin
453  if rising_edge(pgpRxClk) then
454  if pgpRxClkRst = '1' then
455  crcNotZero <= '0' after TPD_G;
456  linkDownCnt <= (others=>'0') after TPD_G;
457  inCellEn <= '0' after TPD_G;
458  inCellSerErr <= '0' after TPD_G;
459  inCellSOF <= '0' after TPD_G;
460  inCellEOC <= '0' after TPD_G;
461  inCellEOF <= '0' after TPD_G;
462  inCellEOFE <= '0' after TPD_G;
463  inCellCnt <= (others=>'0') after TPD_G;
464  abortEn <= '0' after TPD_G;
465  abortVc <= (others=>'0') after TPD_G;
466  intCellError <= '0' after TPD_G;
467  dlyCellError <= '0' after TPD_G;
468  pgpRxCellError <= '0' after TPD_G;
469  vcInFrame <= (others=>'0') after TPD_G;
470  elsif pgpRxClkEn = '1' then
471  -- Cell error edge generation
472  dlyCellError <= intCellError after TPD_G;
473  pgpRxCellError <= intCellError and not dlyCellError after TPD_G;
474 
475  -- CRC Error
476  if crcRxOut = 0 then
477  crcNotZero <= '0' after TPD_G;
478  else
479  crcNotZero <= '1' after TPD_G;
480  end if;
481 
482  -- Link down counter
483  if pgpRxLinkReady = '1' then
484  linkDownCnt <= (others=>'0') after TPD_G;
485  elsif linkDownCnt(4) = '0' then
486  linkDownCnt <= linkDownCnt + 1 after TPD_G;
487  end if;
488 
489  -- Count size of each cell received
490  if cellRxPause = '0' then
491  if inCellEn = '1' then
492  inCellCnt <= inCellCnt - 1 after TPD_G;
493  else
494  inCellCnt <= (others=>'1') after TPD_G;
495  end if;
496  end if;
497 
498  -- Link is down. Terminate transmission for any active VCs
499  if pgpRxLinkReady = '0' then
500 
501  -- Enabled every 4 clocks to ensure proper spacing between generated EOFs
502  if linkDownCnt(1 downto 0) = "11" then
503 
504  -- VC is active
505  if vcInFrame(conv_integer(linkDownCnt(3 downto 2))) = '1' then
506  abortEn <= '1' after TPD_G;
507  vcInFrame(conv_integer(linkDownCnt(3 downto 2))) <= '0' after TPD_G;
508  else
509  abortEn <= '0' after TPD_G;
510  end if;
511  else
512  abortEn <= '0' after TPD_G;
513  end if;
514 
515  -- VC for abort
516  abortVc <= linkDownCnt(3 downto 2) after TPD_G;
517 
518  -- Clear cell control signals
519  inCellEn <= '0' after TPD_G;
520  inCellSerErr <= '0' after TPD_G;
521  inCellSOF <= '0' after TPD_G;
522  inCellEOC <= '0' after TPD_G;
523  inCellEOF <= '0' after TPD_G;
524  inCellEOFE <= '0' after TPD_G;
525  intCellError <= '0' after TPD_G;
526 
527  -- Link is ready
528  else
529 
530  -- Clear abort flags
531  abortVc <= (others=>'0') after TPD_G;
532  abortEn <= '0' after TPD_G;
533 
534  -- Link flush set
535  if pgpRxFlush = '1' then
536  vcInFrame <= (others=>'0') after TPD_G;
537 
538  -- Pipeline enable
539  elsif cellRxPause = '0' then
540 
541  -- SOC Received
542  if detSOC = '1' then
543 
544  -- Do we output data and mark in frame?
545  -- Yes if SOF is set
546  -- Yes if already in frame
547  if nxtCellEn = '1' then
548  inCellEn <= '1' after TPD_G;
549  vcInFrame(conv_integer(currVc)) <= '1' after TPD_G;
550  end if;
551 
552  -- Do we mark output as SOF?
553  -- Yes if SOF is seen and we are not already in frame
554  if detSOF = '1' and vcInFrame(conv_integer(currVc)) = '0' then
555  inCellSOF <= '1' after TPD_G;
556  end if;
557 
558  -- Do we mark serial error flag?
559  -- Yes if SOF is set and we are already in frame
560  -- Yes if serial number error and we are in frame
561  if vcInFrame(conv_integer(currVc)) = '1' and (detSOF = '1' or serErr = '1') then
562  inCellSerErr <= '1' after TPD_G;
563  end if;
564 
565  -- Mark out of cell after EOC
566  elsif inCellEOC = '1' then
567  inCellEn <= '0' after TPD_G;
568  inCellSerErr <= '0' after TPD_G;
569  inCellSOF <= '0' after TPD_G;
570 
571  -- Clear frame state if EOF
572  if inCellEOF = '1' then
573  vcInFrame(conv_integer(currVc)) <= '0' after TPD_G;
574  end if;
575 
576  -- Clear SOF
577  else
578  inCellSOF <= '0' after TPD_G;
579  end if;
580 
581  -- End of cell, check for short cell case
582  if detEOC = '1' and (inCellEn = '1' or nxtCellEn = '1') then
583  inCellEOC <= '1' after TPD_G;
584  intCellError <= inCellSerErr or crcNotZero after TPD_G;
585 
586  -- Cell is too short
587  if detEOF = '0' and inCellCnt /= 1 and EN_SHORT_CELLS_G = 0 then
588  inCellEOF <= '1' after TPD_G;
589  inCellEOFE <= '1' after TPD_G;
590  intCellError <= '1' after TPD_G;
591  else
592  inCellEOF <= detEOF or inCellSerErr or crcNotZero after TPD_G;
593  inCellEOFE <= detEOFE or inCellSerErr or crcNotZero after TPD_G;
594  intCellError <= inCellSerErr or crcNotZero after TPD_G;
595  end if;
596 
597  -- Cell might be too long
598  elsif inCellEn = '1' and inCellCnt = 0 and inCellEOC = '0' then
599  inCellEOC <= '1' after TPD_G;
600  inCellEOF <= '1' after TPD_G;
601  inCellEOFE <= '1' after TPD_G;
602  intCellError <= '1' after TPD_G;
603  else
604  inCellEOC <= '0' after TPD_G;
605  inCellEOF <= '0' after TPD_G;
606  inCellEOFE <= '0' after TPD_G;
607  intCellError <= '0' after TPD_G;
608  end if;
609  end if;
610  end if;
611  end if;
612  end if;
613  end process;
614 
615 
616  -- Do we output data and mark in frame?
617  -- Yes if SOF is set
618  -- Yes if already in frame
619  nxtCellEn <= '1' when (detSOF = '1' or vcInFrame(conv_integer(currVc)) = '1') else '0';
620 
621 
622  -- Data Output
623  process ( pgpRxClk ) begin
624  if rising_edge(pgpRxClk) then
625  if pgpRxClkRst = '1' then
626  vcFrameRxData <= (others=>'0') after TPD_G;
627  vcFrameRxSOF <= '0' after TPD_G;
628  vcFrameRxEOF <= '0' after TPD_G;
629  vcFrameRxEOFE <= '0' after TPD_G;
630  vc0FrameRxValid <= '0' after TPD_G;
631  vc1FrameRxValid <= '0' after TPD_G;
632  vc2FrameRxValid <= '0' after TPD_G;
633  vc3FrameRxValid <= '0' after TPD_G;
634  elsif pgpRxClkEn = '1' then
635  -- Data abort is enabled
636  if abortEn = '1' then
637  case abortVc is
638  when "00" =>
639  vc0FrameRxValid <= '1' after TPD_G;
640  vc1FrameRxValid <= '0' after TPD_G;
641  vc2FrameRxValid <= '0' after TPD_G;
642  vc3FrameRxValid <= '0' after TPD_G;
643  when "01" =>
644  vc0FrameRxValid <= '0' after TPD_G;
645  vc1FrameRxValid <= '1' after TPD_G;
646  vc2FrameRxValid <= '0' after TPD_G;
647  vc3FrameRxValid <= '0' after TPD_G;
648  when "10" =>
649  vc0FrameRxValid <= '0' after TPD_G;
650  vc1FrameRxValid <= '0' after TPD_G;
651  vc2FrameRxValid <= '1' after TPD_G;
652  vc3FrameRxValid <= '0' after TPD_G;
653  when others =>
654  vc0FrameRxValid <= '0' after TPD_G;
655  vc1FrameRxValid <= '0' after TPD_G;
656  vc2FrameRxValid <= '0' after TPD_G;
657  vc3FrameRxValid <= '1' after TPD_G;
658  end case;
659 
660  -- Abort output
661  vcFrameRxSOF <= '0' after TPD_G;
662  vcFrameRxEOF <= '1' after TPD_G;
663  vcFrameRxEOFE <= '1' after TPD_G;
664 
665  -- Pipeline is enabled
666  elsif cellRxPause = '0' and inCellEn = '1' then
667  case currVc is
668  when "00" =>
669  vc0FrameRxValid <= '1' after TPD_G;
670  vc1FrameRxValid <= '0' after TPD_G;
671  vc2FrameRxValid <= '0' after TPD_G;
672  vc3FrameRxValid <= '0' after TPD_G;
673  when "01" =>
674  vc0FrameRxValid <= '0' after TPD_G;
675  vc1FrameRxValid <= '1' after TPD_G;
676  vc2FrameRxValid <= '0' after TPD_G;
677  vc3FrameRxValid <= '0' after TPD_G;
678  when "10" =>
679  vc0FrameRxValid <= '0' after TPD_G;
680  vc1FrameRxValid <= '0' after TPD_G;
681  vc2FrameRxValid <= '1' after TPD_G;
682  vc3FrameRxValid <= '0' after TPD_G;
683  when others =>
684  vc0FrameRxValid <= '0' after TPD_G;
685  vc1FrameRxValid <= '0' after TPD_G;
686  vc2FrameRxValid <= '0' after TPD_G;
687  vc3FrameRxValid <= '1' after TPD_G;
688  end case;
689 
690  -- Data output
691  vcFrameRxData <= outData after TPD_G;
692  vcFrameRxSOF <= inCellSOF after TPD_G;
693  vcFrameRxEOF <= inCellEOF after TPD_G;
694  vcFrameRxEOFE <= inCellEOFE after TPD_G;
695 
696  -- Paused or no data
697  else
698  vc0FrameRxValid <= '0' after TPD_G;
699  vc1FrameRxValid <= '0' after TPD_G;
700  vc2FrameRxValid <= '0' after TPD_G;
701  vc3FrameRxValid <= '0' after TPD_G;
702  end if;
703  end if;
704  end if;
705  end process;
706 
707 
708  -- Update buffer status on successfull cell reception
709  process ( pgpRxClk ) begin
710  if rising_edge(pgpRxClk) then
711  if pgpRxClkRst = '1' then
712  vc0RemAlmostFull <= '1' after TPD_G;
713  vc0RemOverflow <= '0' after TPD_G;
714  vc1RemAlmostFull <= '1' after TPD_G;
715  vc1RemOverflow <= '0' after TPD_G;
716  vc2RemAlmostFull <= '1' after TPD_G;
717  vc2RemOverflow <= '0' after TPD_G;
718  vc3RemAlmostFull <= '1' after TPD_G;
719  vc3RemOverflow <= '0' after TPD_G;
720  elsif pgpRxClkEn = '1' then
721  -- Link is not ready, force buffer states to bad
722  if pgpRxLinkReady = '0' then
723  vc0RemAlmostFull <= '1' after TPD_G;
724  vc0RemOverflow <= '0' after TPD_G;
725  vc1RemAlmostFull <= '1' after TPD_G;
726  vc1RemOverflow <= '0' after TPD_G;
727  vc2RemAlmostFull <= '1' after TPD_G;
728  vc2RemOverflow <= '0' after TPD_G;
729  vc3RemAlmostFull <= '1' after TPD_G;
730  vc3RemOverflow <= '0' after TPD_G;
731 
732  -- Update buffer status
733  elsif cellRxEOC = '1' then
734  vc0RemAlmostFull <= cellRxData(8) after TPD_G;
735  vc0RemOverflow <= cellRxData(12) after TPD_G;
736  vc1RemAlmostFull <= cellRxData(9) after TPD_G;
737  vc1RemOverflow <= cellRxData(13) after TPD_G;
738  vc2RemAlmostFull <= cellRxData(10) after TPD_G;
739  vc2RemOverflow <= cellRxData(14) after TPD_G;
740  vc3RemAlmostFull <= cellRxData(11) after TPD_G;
741  vc3RemOverflow <= cellRxData(15) after TPD_G;
742  end if;
743  end if;
744  end if;
745  end process;
746 
747 end Pgp2bRxCell;
748 
Pgp2bRxCell.Pgp2bRxCell.vc0Serial
slv( 5 downto 0) vc0Serial
Definition: Pgp2bRxCell.vhd:170
Pgp2bRxCell.vcFrameRxEOF
out vcFrameRxEOFsl
Definition: Pgp2bRxCell.vhd:62
Pgp2bRxCell.Pgp2bRxCell.vc1Serial
slv( 5 downto 0) vc1Serial
Definition: Pgp2bRxCell.vhd:172
Pgp2bRxCell.Pgp2bRxCell.dly1Data
slv( RX_LANE_CNT_G* 16- 1 downto 0) dly1Data
Definition: Pgp2bRxCell.vhd:111
StdRtlPkg.sl
std_logic sl
Definition: StdRtlPkg.vhd:28
Pgp2bRxCell.cellRxSOC
in cellRxSOCsl
Definition: Pgp2bRxCell.vhd:53
Pgp2bRxCell.vc0RemOverflow
out vc0RemOverflowsl
Definition: Pgp2bRxCell.vhd:69
Pgp2bRxCell.vcFrameRxEOFE
out vcFrameRxEOFEsl
Definition: Pgp2bRxCell.vhd:63
Pgp2bRxCell.vc3RemOverflow
out vc3RemOverflowsl
Definition: Pgp2bRxCell.vhd:84
Pgp2bRxCell.vcFrameRxSOF
out vcFrameRxSOFsl
Definition: Pgp2bRxCell.vhd:61
Pgp2bRxCell.pgpRxClkRst
in pgpRxClkRstsl
Definition: Pgp2bRxCell.vhd:40
Pgp2bRxCell.EN_SHORT_CELLS_G
EN_SHORT_CELLS_Ginteger := 1
Definition: Pgp2bRxCell.vhd:32
Pgp2bRxCell.Pgp2bRxCell.dly0Data
slv( RX_LANE_CNT_G* 16- 1 downto 0) dly0Data
Definition: Pgp2bRxCell.vhd:105
Pgp2bRxCell.vc2RemAlmostFull
out vc2RemAlmostFullsl
Definition: Pgp2bRxCell.vhd:78
Pgp2bRxCell.Pgp2bRxCell.compData
slv( RX_LANE_CNT_G* 16- 1 downto 0) compData
Definition: Pgp2bRxCell.vhd:152
Pgp2bRxCell.TPD_G
TPD_Gtime := 1 ns
Definition: Pgp2bRxCell.vhd:30
Pgp2bRxCell.PAYLOAD_CNT_TOP_G
PAYLOAD_CNT_TOP_Ginteger := 7
Definition: Pgp2bRxCell.vhd:34
Pgp2bRxCell.vc1RemAlmostFull
out vc1RemAlmostFullsl
Definition: Pgp2bRxCell.vhd:73
Pgp2bRxCell.Pgp2bRxCell.vcInFrame
slv( 3 downto 0) vcInFrame
Definition: Pgp2bRxCell.vhd:167
Pgp2bRx.ieee
_library_ ieeeieee
Definition: Pgp2bRx.vhd:19
Pgp2bRxCell.Pgp2bRxCell.vc2Serial
slv( 5 downto 0) vc2Serial
Definition: Pgp2bRxCell.vhd:174
Pgp2bRxCell.vc2RemOverflow
out vc2RemOverflowsl
Definition: Pgp2bRxCell.vhd:79
Pgp2bRxCell.cellRxData
in cellRxDataslv( RX_LANE_CNT_G* 16- 1 downto 0)
Definition: Pgp2bRxCell.vhd:58
Pgp2bRxCell.vc2FrameRxValid
out vc2FrameRxValidsl
Definition: Pgp2bRxCell.vhd:77
Pgp2bRxCell.vc1FrameRxValid
out vc1FrameRxValidsl
Definition: Pgp2bRxCell.vhd:72
Pgp2bRxCell.vc0FrameRxValid
out vc0FrameRxValidsl
Definition: Pgp2bRxCell.vhd:67
Pgp2bRxCell.Pgp2bRxCell.outData
slv( RX_LANE_CNT_G* 16- 1 downto 0) outData
Definition: Pgp2bRxCell.vhd:155
Pgp2bRxCell.Pgp2bRxCell.dly2Data
slv( RX_LANE_CNT_G* 16- 1 downto 0) dly2Data
Definition: Pgp2bRxCell.vhd:117
Pgp2bRxCell.vc3FrameRxValid
out vc3FrameRxValidsl
Definition: Pgp2bRxCell.vhd:82
Pgp2bRxCell.Pgp2bRxCell.dly7Data
slv( RX_LANE_CNT_G* 16- 1 downto 0) dly7Data
Definition: Pgp2bRxCell.vhd:147
Pgp2bRxCell.vcFrameRxData
out vcFrameRxDataslv( RX_LANE_CNT_G* 16- 1 downto 0)
Definition: Pgp2bRxCell.vhd:64
Pgp2bRxCell.pgpRxClk
in pgpRxClksl
Definition: Pgp2bRxCell.vhd:39
Pgp2bRxCell.Pgp2bRxCell.abortVc
slv( 1 downto 0) abortVc
Definition: Pgp2bRxCell.vhd:178
Pgp2bRxCell.cellRxEOFE
in cellRxEOFEsl
Definition: Pgp2bRxCell.vhd:57
Pgp2bRxCell.crcRxIn
out crcRxInslv( RX_LANE_CNT_G* 16- 1 downto 0)
Definition: Pgp2bRxCell.vhd:87
Pgp2bRxCell.crcRxValid
out crcRxValidsl
Definition: Pgp2bRxCell.vhd:89
Pgp2bRxCell.cellRxEOC
in cellRxEOCsl
Definition: Pgp2bRxCell.vhd:55
Pgp2bRxCell.Pgp2bRxCell.dly3Data
slv( RX_LANE_CNT_G* 16- 1 downto 0) dly3Data
Definition: Pgp2bRxCell.vhd:123
Pgp2bRxCell.Pgp2bRxCell.dly6Data
slv( RX_LANE_CNT_G* 16- 1 downto 0) dly6Data
Definition: Pgp2bRxCell.vhd:141
Pgp2bRxCell.cellRxEOF
in cellRxEOFsl
Definition: Pgp2bRxCell.vhd:56
Pgp2bRxCell.crcRxInit
out crcRxInitsl
Definition: Pgp2bRxCell.vhd:88
Pgp2bRxCell.RX_LANE_CNT_G
RX_LANE_CNT_Ginteger range 1 to 2:= 1
Definition: Pgp2bRxCell.vhd:31
Pgp2bRxCell.vc3RemAlmostFull
out vc3RemAlmostFullsl
Definition: Pgp2bRxCell.vhd:83
Pgp2bRxCell.cellRxSOF
in cellRxSOFsl
Definition: Pgp2bRxCell.vhd:54
Pgp2bRxCell.Pgp2bRxCell.dly5Data
slv( RX_LANE_CNT_G* 16- 1 downto 0) dly5Data
Definition: Pgp2bRxCell.vhd:135
Pgp2bRxCell.Pgp2bRxCell.linkDownCnt
slv( 4 downto 0) linkDownCnt
Definition: Pgp2bRxCell.vhd:150
Pgp2bRxCell.Pgp2bRxCell.dly4Data
slv( RX_LANE_CNT_G* 16- 1 downto 0) dly4Data
Definition: Pgp2bRxCell.vhd:129
Pgp2bRxCell.cellRxPause
in cellRxPausesl
Definition: Pgp2bRxCell.vhd:52
Pgp2bRxCell.pgpRxClkEn
in pgpRxClkEnsl := '1'
Definition: Pgp2bRxCell.vhd:38
Pgp2bRxCell.crcRxOut
in crcRxOutslv( 31 downto 0)
Definition: Pgp2bRxCell.vhd:91
Pgp2bRxCell.Pgp2bRxCell.vc3Serial
slv( 5 downto 0) vc3Serial
Definition: Pgp2bRxCell.vhd:176
Pgp2bRxCell.Pgp2bRxCell.inCellCnt
slv( PAYLOAD_CNT_TOP_G downto 0) inCellCnt
Definition: Pgp2bRxCell.vhd:166
Pgp2bRxCell.pgpRxFlush
in pgpRxFlushsl
Definition: Pgp2bRxCell.vhd:43
Pgp2bRxCell.pgpRxCellError
out pgpRxCellErrorsl
Definition: Pgp2bRxCell.vhd:49
Pgp2bRxCell.vc0RemAlmostFull
out vc0RemAlmostFullsl
Definition: Pgp2bRxCell.vhd:68
StdRtlPkg.slv
std_logic_vector slv
Definition: StdRtlPkg.vhd:29
Pgp2bRxCell.vc1RemOverflow
out vc1RemOverflowsl
Definition: Pgp2bRxCell.vhd:74
Pgp2bRxCell.Pgp2bRxCell.currVc
slv( 1 downto 0) currVc
Definition: Pgp2bRxCell.vhd:168
Pgp2bRxCell.pgpRxLinkReady
in pgpRxLinkReadysl
Definition: Pgp2bRxCell.vhd:46