SURF  1.0
GLinkTxToRx.vhd
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1 -------------------------------------------------------------------------------
2 -- File : GLinkTxToRx.vhd
3 -- Company : SLAC National Accelerator Laboratory
4 -- Created : 2014-05-20
5 -- Last update: 2014-05-20
6 -------------------------------------------------------------------------------
7 -- Description: Wrapper for GLinkEncoder/GLinkDecoder loopback testing
8 -------------------------------------------------------------------------------
9 -- This file is part of 'SLAC Firmware Standard Library'.
10 -- It is subject to the license terms in the LICENSE.txt file found in the
11 -- top-level directory of this distribution and at:
12 -- https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html.
13 -- No part of 'SLAC Firmware Standard Library', including this file,
14 -- may be copied, modified, propagated, or distributed except according to
15 -- the terms contained in the LICENSE.txt file.
16 -------------------------------------------------------------------------------
17 
18 library ieee;
19 use ieee.std_logic_1164.all;
20 
21 use work.StdRtlPkg.all;
22 use work.GlinkPkg.all;
23 
24 --! @see entity
25  --! @ingroup protocols_glink_core
26 entity GLinkTxToRx is
27  generic (
28  TPD_G : time := 1 ns;
29  RST_ASYNC_G : boolean := false;
30  RST_POLARITY_G : sl := '1'; -- '1' for active HIGH reset, '0' for active LOW reset
31  FLAGSEL_G : boolean := false);
32  port (
33  -- TX Signals
34  txReady : in sl;
35  gLinkTx : in GLinkTxType;
36  -- RX Signals
37  rxReady : in sl;
38  gLinkRx : out GLinkRxType;
41  -- Global Signals
42  en : in sl := '1';
43  clk : in sl;
44  rst : in sl);
45 end GLinkTxToRx;
46 
47 architecture mapping of GLinkTxToRx is
48 
49  signal encodedData : slv(19 downto 0);
50 
51 begin
52 
53  GLinkEncoder_Inst : entity work.GLinkEncoder
54  generic map(
55  TPD_G => TPD_G,
58  FLAGSEL_G => FLAGSEL_G)
59  port map (
60  en => en,
61  clk => clk,
62  rst => rst,
63  gLinkTx => gLinkTx,
65 
66  GLinkDecoder_Inst : entity work.GLinkDecoder
67  generic map(
68  TPD_G => TPD_G,
71  FLAGSEL_G => FLAGSEL_G)
72  port map (
73  en => en,
74  clk => clk,
75  rst => rst,
77  rxReady => rxReady,
78  txReady => txReady,
79  gLinkRx => gLinkRx,
82 
83 end mapping;
TPD_Gtime := 1 ns
Definition: GLinkTxToRx.vhd:28
out encodedDataslv( 19 downto 0)
std_logic sl
Definition: StdRtlPkg.vhd:28
in gtRxDataslv( 19 downto 0)
RST_ASYNC_Gboolean := false
out gLinkRxGLinkRxType
TPD_Gtime := 1 ns
in ensl := '1'
Definition: GLinkTxToRx.vhd:42
out gLinkRxGLinkRxType
Definition: GLinkTxToRx.vhd:38
RST_ASYNC_Gboolean := false
Definition: GLinkTxToRx.vhd:29
in rxReadysl
Definition: GLinkTxToRx.vhd:37
RST_POLARITY_Gsl := '1'
in gLinkTxGLinkTxType
RST_POLARITY_Gsl := '1'
Definition: GLinkTxToRx.vhd:30
RST_ASYNC_Gboolean := false
out decoderErrorsl
Definition: GLinkTxToRx.vhd:39
slv( 19 downto 0) encodedData
Definition: GLinkTxToRx.vhd:49
TPD_Gtime := 1 ns
out decoderErrorLsl
out decoderErrorLsl
Definition: GLinkTxToRx.vhd:40
FLAGSEL_Gboolean := false
in ensl := '1'
in txReadysl
Definition: GLinkTxToRx.vhd:34
FLAGSEL_Gboolean := false
out decoderErrorsl
in ensl := '1'
RST_POLARITY_Gsl := '1'
FLAGSEL_Gboolean := false
Definition: GLinkTxToRx.vhd:31
in gLinkTxGLinkTxType
Definition: GLinkTxToRx.vhd:35
_library_ ieeeieee
Definition: GLinkPkg.vhd:19
std_logic_vector slv
Definition: StdRtlPkg.vhd:29