SURF  1.0
AxiXcf128Pkg.vhd
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1 -------------------------------------------------------------------------------
2 -- File : AxiXcf128Pkg.vhd
3 -- Company : SLAC National Accelerator Laboratory
4 -- Created : 2014-04-18
5 -- Last update: 2015-01-13
6 -------------------------------------------------------------------------------
7 -- Description: AxiXcf128 Package File
8 -------------------------------------------------------------------------------
9 -- This file is part of 'SLAC Firmware Standard Library'.
10 -- It is subject to the license terms in the LICENSE.txt file found in the
11 -- top-level directory of this distribution and at:
12 -- https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html.
13 -- No part of 'SLAC Firmware Standard Library', including this file,
14 -- may be copied, modified, propagated, or distributed except according to
15 -- the terms contained in the LICENSE.txt file.
16 -------------------------------------------------------------------------------
17 
18 library ieee;
19 use ieee.std_logic_1164.all;
20 
21 use work.StdRtlPkg.all;
22 
23 package AxiXcf128Pkg is
24 --! @file
25  --! @ingroup devices_Xilinx_xcf128
26 
27  type AxiXcf128InOutType is record
28  data : slv(15 downto 0);
29  end record;
30  type AxiXcf128InOutArray is array (natural range <>) of AxiXcf128InOutType;
31  type AxiXcf128InOutVectorArray is array (integer range<>, integer range<>)of AxiXcf128InOutType;
33  data => (others => 'Z'));
34 
35  type AxiXcf128OutType is record
36  ceL : sl;
37  oeL : sl;
38  weL : sl;
39  latch : sl;
40  addr : slv(22 downto 0);
41  end record;
42  type AxiXcf128OutArray is array (natural range <>) of AxiXcf128OutType;
43  type AxiXcf128OutVectorArray is array (integer range<>, integer range<>)of AxiXcf128OutType;
45  '1',
46  '1',
47  '1',
48  '1',
49  (others => '1'));
50 
51  type AxiXcf128StatusType is record
52  data : slv(15 downto 0);
53  end record;
55  data => (others => '1'));
56 
57  type AxiXcf128ConfigType is record
58  ceL : sl;
59  oeL : sl;
60  weL : sl;
61  latch : sl;
62  addr : slv(22 downto 0);
64  data : slv(15 downto 0);
65  end record;
67  '1',
68  '1',
69  '1',
70  '0',
71  (others => '1'),
72  '1',
73  (others => '1'));
74 
75 end package;
_library_ ieeeieee
std_logic sl
Definition: StdRtlPkg.vhd:28
array(natural range <> ) of AxiXcf128InOutType AxiXcf128InOutArray
AxiXcf128InOutType :=(data =>( others => 'Z')) AXI_XCF128_IN_OUT_INIT_C
slv( 15 downto 0) data
AxiXcf128OutType :=( '1', '1', '1', '1',( others => '1')) AXI_XCF128_OUT_INIT_C
AxiXcf128ConfigType :=( '1', '1', '1', '0',( others => '1'), '1',( others => '1')) AXI_XCF128_CONFIG_INIT_C
array(integer range <> ,integer range <> ) of AxiXcf128InOutType AxiXcf128InOutVectorArray
slv( 22 downto 0) addr
AxiXcf128StatusType :=(data =>( others => '1')) AXI_XCF128_STATUS_INIT_C
array(integer range <> ,integer range <> ) of AxiXcf128OutType AxiXcf128OutVectorArray
std_logic_vector slv
Definition: StdRtlPkg.vhd:29
array(natural range <> ) of AxiXcf128OutType AxiXcf128OutArray