Supported Targets
The full matrix of firmware/targets/ build outputs. Each row maps a
(Board, Protocol, Variant) tuple to a target directory. Every target
listed here builds with the same make workflow described in
First Build — XilinxVariumC1100DmaLoopback.
By Board
XilinxVariumC1100
Gen4x8 PCIe + HBM2. PRJ_PART = XCU55N-FSVH2892-2L-E. Vivado
2024.2+ required (CMS + HBM IP).
Target |
Notes |
|---|---|
|
DMA loopback application; see First Build — XilinxVariumC1100DmaLoopback. |
|
DMA loopback with PCIe bifurcation (two x4 endpoints). |
|
In-hardware PRBS tester; see Building XilinxVariumC1100PrbsTester. |
|
PGP2b protocol. |
|
PGP4 @ 6.25 Gbps. |
|
PGP4 @ 10.3125 Gbps. |
|
PGP4 @ 15.46875 Gbps. |
|
PGP4 @ 25 Gbps, RS-FEC enabled. |
|
HTSP 100 Gbps. |
|
HTSP 100 Gbps with PCIe bifurcation. |
XilinxKcu1500
Gen3x8 PCIe + DDR4. Multiple PGP variants. Vivado 2020.1+.
Target |
Notes |
|---|---|
|
DMA loopback application (also has |
|
In-hardware PRBS tester. |
|
Various PGP2b / PGP3 / PGP4 line-rate combinations — see firmware/targets/XilinxKcu1500/ for the full list. |
Other Boards
Each board has a similar set of DmaLoopback + PrbsTester + protocol variants where supported. Browse the source tree to see the full matrix:
Board |
Directory |
|---|---|
Xilinx Alveo U200 |
|
Xilinx Alveo U250 |
|
Xilinx Alveo U280 |
|
Xilinx Alveo U50 |
|
Xilinx Alveo U55c |
|
Xilinx VCU128 |
|
Xilinx KCU105 |
|
Xilinx KCU116 |
|
SLAC PGP Card G4 |
|
Abaco PC821 (KU085) |
|
Abaco PC821 (KU115) |
|
Alpha Data KU3 |
|
BittWare XUP-VV8 |
For per-board PCIe-core details (PCIe generation, memory type,
HW_TYPE_* constant, etc.) see the
axi-pcie-core supported_boards reference.