I2cRegMasterPkg Package Body Reference

Package Body >> I2cRegMasterPkg

Procedures
	writeI2cReg( signal clk: in sl signal regIn: out i2cRegMasterInType signal regOut: in i2cRegMasterOutType i2cAddr: in slv regAddr: in slv regData: in slv endianness: in sl debug: in boolean false )
	writeI2cBurst8( signal clk: in sl signal regIn: out i2cRegMasterInType signal regOut: in i2cRegMasterOutType i2cAddr: in slv regAddr: in slv regData: in Slv8Array ( 0 to 3 ) endianness: in sl debug: in boolean false )
	readI2cReg( signal clk: in sl signal regIn: out i2cRegMasterInType signal regOut: in i2cRegMasterOutType i2cAddr: in slv regAddr: in slv regData: out slv endianness: in sl debug: in boolean false )
	readI2cBurst8( signal clk: in sl signal regIn: out i2cRegMasterInType signal regOut: in i2cRegMasterOutType i2cAddr: in slv regAddr: in slv regData: out Slv8Array ( 0 to 3 ) endianness: in sl debug: in boolean false )
	writeI2cReg( signal clk: in sl signal regIn: out i2cRegMasterInType signal regOut: in i2cRegMasterOutType i2cAddr: in slv regAddr: in slv regData: in slv endianness: in sl debug: in boolean false )
	writeI2cBurst8( signal clk: in sl signal regIn: out i2cRegMasterInType signal regOut: in i2cRegMasterOutType i2cAddr: in slv regAddr: in slv regData: in Slv8Array ( 0 to 3 ) endianness: in sl debug: in boolean false )
	readI2cReg( signal clk: in sl signal regIn: out i2cRegMasterInType signal regOut: in i2cRegMasterOutType i2cAddr: in slv regAddr: in slv regData: out slv endianness: in sl debug: in boolean false )
	readI2cBurst8( signal clk: in sl signal regIn: out i2cRegMasterInType signal regOut: in i2cRegMasterOutType i2cAddr: in slv regAddr: in slv regData: out Slv8Array ( 0 to 3 ) endianness: in sl debug: in boolean false )

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/I2cRegMasterSimPkg.vhd
• protocols/i2c/sim/I2cRegMasterSimPkg.vhd