SspDecoder10b12b Entity Reference

Inheritance diagram for SspDecoder10b12b:

Collaboration diagram for SspDecoder10b12b:

Entities
SspDecoder10b12b.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
std_logic_arith
std_logic_unsigned
StdRtlPkg	Package <StdRtlPkg>
Code10b12bPkg	Package <Code10b12bPkg>

Generics
TPD_G	time := 1 ns
RST_POLARITY_G	sl := ' 0 '
RST_ASYNC_G	boolean := true
BRK_FRAME_ON_ERROR_G	boolean := true

Ports
clk	in	sl
rst	in	sl := RST_POLARITY_G
validIn	in	sl := ' 1 '
gearboxAligned	in	sl := ' 1 '
dataIn	in	slv ( 11 downto 0 )
validOut	out	sl
dataOut	out	slv ( 9 downto 0 )
errorOut	out	sl
sof	out	sl
eof	out	sl
eofe	out	sl
idleCode	out	sl
validDec	out	sl
codeError	out	sl
dispError	out	sl

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/SspDecoder10b12b.vhd
• protocols/ssp/rtl/SspDecoder10b12b.vhd