Architecture >> SinCosLut::rtl

Functions
QuarterWaveLutType	initQuarterWaveLut ( QUARTER_DEPTH: in integer , STYP: in sfixed )

Processes
comb	( phaseIn , quarterWaveLut , r , rst )
seq	( clk )

Constants
TOT_LATENCY_C	integer := 4 + ite ( REG_IN_G , 1 , 0 )
INT_PHASE_WIDTH_C	integer := PHASE_WIDTH_G- 2
QUARTER_DEPTH_C	integer := 2 INT_PHASE_WIDTH_C**
INT_OVERFLOW_STYLE_C	fixed_overflow_style_type := fixed_wrap
INT_ROUNDING_STYLE_C	fixed_round_style_type := fixed_truncate
REG_INIT_C	RegType := ( rst = > ( others = > ' 0 ' ) , phaseMsb = > ( others = > ' 0 ' ) , phaseMsbR = > ( others = > ' 0 ' ) , phaseMsbRR = > ( others = > ' 0 ' ) , phaseMsbRRR = > ( others = > ' 0 ' ) , phaseLsb = > ( others = > ' 0 ' ) , sinAddr = > ( others = > ' 0 ' ) , cosAddr = > ( others = > ' 0 ' ) , lutSin = > ( others = > ' 0 ' ) , lutCos = > ( others = > ' 0 ' ) , lutSinDoReg = > ( others = > ' 0 ' ) , lutCosDoReg = > ( others = > ' 0 ' ) , sinCosOut = > ( others = > ( others = > ' 0 ' ) ) )

Types
QuarterWaveLutType	( 0 to QUARTER_DEPTH_C- 1 ) sfixed ( sinCosOut.re ' range )

Signals
r	RegType := REG_INIT_C
rin	RegType
quarterWaveLut	QuarterWaveLutType := initQuarterWaveLut ( QUARTER_DEPTH_C , r.lutSin )
slvDelayIn	slv ( USER_WIDTH_G downto 0 )
slvDelayOut	slv ( USER_WIDTH_G downto 0 )

Records
RegType

Instantiations
u_match_cmult_delay	SlvFixedDelay <Entity SlvFixedDelay>

The documentation for this design unit was generated from the following file:

Functions

Processes