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Constants | Instantiations | Processes | Records | Signals
SgmiiDp83867Mdio.rtl Architecture Reference
Architecture >> SgmiiDp83867Mdio::rtl

Processes

COMB  ( args , hdlrDone , r )
SEQ  ( clk )

Constants

P_INIT_C  MdioProgramArray := ( mdioWriteInst ( PHY_G , 16#0D# , x " 001F " , false ) , mdioWriteInst ( PHY_G , 16#0E# , x " 00D3 " , false ) , mdioWriteInst ( PHY_G , 16#0D# , x " 401F " , false ) , mdioWriteInst ( PHY_G , 16#0E# , x " 4000 " , false ) , mdioWriteInst ( PHY_G , 16#0D# , x " 001F " , false ) , mdioWriteInst ( PHY_G , 16#0E# , x " 0032 " , false ) , mdioWriteInst ( PHY_G , 16#0D# , x " 401F " , false ) , mdioWriteInst ( PHY_G , 16#0E# , x " 0000 " , false ) , mdioWriteInst ( PHY_G , 16#00# , x " 1140 " , false ) , mdioWriteInst ( PHY_G , 16#10# , x " 5848 " , false ) , mdioWriteInst ( PHY_G , 16#14# , x " 2907 " , false ) , mdioWriteInst ( PHY_G , 16#09# , X " 0200 " , false ) , mdioWriteInst ( PHY_G , 16#04# , X " 0001 " , false ) , mdioWriteInst ( PHY_G , 16#1F# , x " 4000 " , true ) )
REG0x13_IDX_C  natural := 0
REG0x11_IDX_C  natural := 1
P_HDLR_C  MdioProgramArray := ( REG0x13_IDX_C = > mdioReadInst ( PHY_G , 16#13# , false ) , REG0x11_IDX_C = > mdioReadInst ( PHY_G , 16#11# , true ) )
NUM_READ_ARGS_C  natural := mdioProgNumReadTransactions ( P_HDLR_C )
REG_INIT_C  RegType := ( s10_100 = > ' 0 ' , s100 = > ' 0 ' , linkIsUp = > ' 0 ' )

Signals

r  RegType := REG_INIT_C
rin  RegType
hdlrDone  sl
args  Slv16Array ( 0 to NUM_READ_ARGS_C- 1 )

Records

RegType 

Instantiations

u_mdiolinkirqhandler  MdioLinkIrqHandler <Entity MdioLinkIrqHandler>
The documentation for this design unit was generated from the following file: