SfixedAccumulator.rtl Architecture Reference

Architecture >> SfixedAccumulator::rtl

Processes
comb	( din , r , rst , sumDly )
seq	( clk )

Constants
TOT_LATENCY_C	integer := 1 + ite ( REG_IN_G , 1 , 0 ) + ite ( REG_OUT_G , 1 , 0 )
INT_OVERFLOW_STYLE_C	fixed_overflow_style_type := fixed_wrap
INT_ROUNDING_STYLE_C	fixed_round_style_type := fixed_truncate
REG_INIT_C	RegType := ( rst = > ' 0 ' , dinR = > ( others = > ' 0 ' ) , doutR = > ( others = > ' 0 ' ) , sum = > ( others = > ' 0 ' ) )

Signals
r	RegType := REG_INIT_C
rin	RegType
sumDly	sfixed ( dout )
userDelayIn	slv ( userIn ' length downto 0 )
userDelayOut	slv ( userIn ' length downto 0 )
slvDelayIn	slv ( din ' length- 1 downto 0 )
slvDelayOut	slv ( din ' length- 1 downto 0 )

Records
RegType

Instantiations
u_user_delay	SlvFixedDelay <Entity SlvFixedDelay>
u_delay	SlvFixedDelay <Entity SlvFixedDelay>

---

The documentation for this design unit was generated from the following file:

• dsp/fixed/SfixedAccumulator.vhd