SaciMaster.rtl Architecture Reference

Architecture >> SaciMaster::rtl

Processes
fall	( clk , rst )
seq	( clk , rst )
comb	( r , saciMasterIn , saciRspFall )
fall	( clk , rst )
seq	( clk , rst )
comb	( r , saciMasterIn , saciRspFall )

Procedures
	synchronize( input: in sl current: in SynchronizerType nextOut: out SynchronizerType )
	synchronize( var: inout SynchronizerType , input: in sl )
	synchronize( input: in slv current: in SynchronizerArray nextOut: out SynchronizerArray )
	synchronize( var: inout SynchronizerArray , input: in slv )
	shiftInLeft( i: in sl r: in slv v: out slv )
	synchronize( input: in sl current: in SynchronizerType nextOut: out SynchronizerType )
	synchronize( var: inout SynchronizerType , input: in sl )
	synchronize( input: in slv current: in SynchronizerArray nextOut: out SynchronizerArray )
	synchronize( var: inout SynchronizerArray , input: in slv )
	shiftInLeft( i: in sl r: in slv v: out slv )

Constants
SYNCHRONIZER_INIT_0_C	SynchronizerType := ( tmp = > ' 0 ' , sync = > ' 0 ' , last = > ' 0 ' )
SYNCHRONIZER_INIT_1_C	SynchronizerType := ( tmp = > ' 1 ' , sync = > ' 1 ' , last = > ' 1 ' )

Types
SynchronizerArray	array ( natural range <> ) of SynchronizerType
StateType	( IDLE_S , CHIP_SELECT_S , TX_S , RX_START_S , RX_HEADER_S , RX_DATA_S , ACK_S )

Signals
r	RegType
rin	RegType
saciRspFall	sl

Records
SynchronizerType
RegType

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/SaciMaster.vhd
• protocols/saci/saci1/rtl/SaciMaster.vhd