|
|
clock | in | std_logic |
|
reset | in | std_logic |
|
portNum | in | std_logic_vector ( 15 downto 0 ) |
|
ssi | in | std_logic |
|
obValid | out | std_logic |
|
obReady | in | std_logic |
|
obData | out | std_logic_vector ( ( TDATA_BYTES_G* 8 ) - 1 downto 0 ) |
|
obUser | out | std_logic_vector ( ( TDATA_BYTES_G* 8 ) - 1 downto 0 ) |
|
obKeep | out | std_logic_vector ( TDATA_BYTES_G- 1 downto 0 ) |
|
obLast | out | std_logic |
|
ibValid | in | std_logic |
|
ibReady | out | std_logic |
|
ibData | in | std_logic_vector ( ( TDATA_BYTES_G* 8 ) - 1 downto 0 ) |
|
ibUser | in | std_logic_vector ( ( TDATA_BYTES_G* 8 ) - 1 downto 0 ) |
|
ibKeep | in | std_logic_vector ( TDATA_BYTES_G- 1 downto 0 ) |
|
ibLast | in | std_logic |
The documentation for this design unit was generated from the following files:
- simlink/ghdl/RogueTcpStream.vhd
- simlink/vcs/RogueTcpStream.vhd
- simlink/xsim/RogueTcpStream.vhd