RoCEv2ICrc Entity Reference

Inheritance diagram for RoCEv2ICrc:

Entities
RoCEv2ICrc.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
numeric_std
StdRtlPkg	Package <StdRtlPkg>
RoCEv2ICrcPkg	Package <RoCEv2ICrcPkg>

Generics
TPD_G	time := 1 ns
SEND_MODE_G	boolean := true

Ports
CLK	in	std_logic
RST_N	in	std_logic
s_axis_tvalid	in	std_logic
s_axis_tdata	in	std_logic_vector ( 255 downto 0 )
s_axis_tkeep	in	std_logic_vector ( 31 downto 0 )
s_axis_tlast	in	std_logic
s_axis_tuser	in	std_logic
s_axis_tready	out	std_logic
m_crc_stream_data	out	std_logic_vector ( 31 downto 0 )
m_crc_stream_valid	out	std_logic
m_crc_stream_ready	in	std_logic

---

The documentation for this design unit was generated from the following file:

• ethernet/RoCEv2/rtl/RoCEv2ICrc.vhd