Pgp4GtyUsIpFecWrapper.mapping Architecture Reference

Architecture >> Pgp4GtyUsIpFecWrapper::mapping

Processes
txComb	( fecTxSerdesData , txBypassFec , txDataIn , txHeaderIn , txR , txRst )
txSeq	( txClk , txRst )
rxComb	( fecRxPcsData , rxAligned , rxBypassFec , rxDataIn , rxDataValidIn , rxFecInjErr , rxFecSlip , rxGearboxSlipIn , rxHeaderIn , rxHeaderValidIn , rxR , rxRst )
rxSeq	( rxClk , rxRst )

Components
Pgp4GtyUsIpFec

Constants
TX_REG_INIT_C	TxRegType := ( fecTxPcsData = > ( others = > ' 0 ' ) , txDataOut = > ( others = > ' 0 ' ) , txHeaderOut = > ( others = > ' 0 ' ) )
RX_REG_INIT_C	RxRegType := ( fecRxSerdesData = > ( others = > ' 0 ' ) , rxFecLock = > ' 0 ' , rxDataValidOut = > ' 0 ' , rxHeaderValidOut = > ' 0 ' , rxGearboxSlipOut = > ' 0 ' , rxDataOut = > ( others = > ' 0 ' ) , rxHeaderOut = > ( others = > ' 0 ' ) )

Signals
txR	TxRegType := TX_REG_INIT_C
txRin	TxRegType
rxR	RxRegType := RX_REG_INIT_C
rxRin	RxRegType
fecTxPcsData	slv ( 65 downto 0 )
fecRxPcsData	slv ( 65 downto 0 )
fecTxSerdesData	slv ( 65 downto 0 )
fecRxSerdesData	slv ( 65 downto 0 )
rxAligned	sl
rxFecSlip	sl

Records
TxRegType
RxRegType

Instantiations
u_fec	pgp4gtyusipfec

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The documentation for this design unit was generated from the following file:

• protocols/pgp/pgp4/gtyUs+/rtl/Pgp4GtyUsIpFecWrapper.vhd