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Pgp3TxProtocol Entity Reference
Inheritance diagram for Pgp3TxProtocol:Entities | |
| Pgp3TxProtocol.rtl | architecture |
Libraries | |
| ieee | |
| surf | |
Use Clauses | |
| std_logic_1164 | |
| std_logic_unsigned | |
| std_logic_arith | |
| StdRtlPkg | Package <StdRtlPkg> |
| AxiStreamPkg | Package <AxiStreamPkg> |
| AxiStreamPacketizer2Pkg | Package <AxiStreamPacketizer2Pkg> |
| SsiPkg | Package <SsiPkg> |
| Pgp3Pkg | Package <Pgp3Pkg> |
Generics | |
| TPD_G | time := 1 ns |
| NUM_VC_G | integer range 1 to 16 := 4 |
| STARTUP_HOLD_G | integer := 1000 |
Ports | ||
| pgpTxClk | in | sl |
| pgpTxRst | in | sl |
| pgpTxIn | in | Pgp3TxInType := PGP3_TX_IN_INIT_C |
| pgpTxOut | out | Pgp3TxOutType |
| pgpTxMaster | in | AxiStreamMasterType |
| pgpTxSlave | out | AxiStreamSlaveType |
| locRxFifoCtrl | in | AxiStreamCtrlArray ( NUM_VC_G- 1 downto 0 ) |
| locRxLinkReady | in | sl |
| remRxLinkReady | in | sl |
| phyTxActive | in | sl |
| protTxReady | in | sl |
| protTxValid | out | sl |
| protTxStart | out | sl |
| protTxData | out | slv ( 63 downto 0 ) |
| protTxHeader | out | slv ( 1 downto 0 ) |
The documentation for this design unit was generated from the following files:
- build/SRC_VHDL/surf/Pgp3TxProtocol.vhd
- protocols/pgp/pgp3/core/rtl/Pgp3TxProtocol.vhd
