Pgp3Rx Entity Reference

Inheritance diagram for Pgp3Rx:

Collaboration diagram for Pgp3Rx:

Entities
Pgp3Rx.rtl	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
std_logic_unsigned
std_logic_arith
StdRtlPkg	Package <StdRtlPkg>
AxiStreamPkg	Package <AxiStreamPkg>
SsiPkg	Package <SsiPkg>
Pgp3Pkg	Package <Pgp3Pkg>
AxiStreamPacketizer2Pkg	Package <AxiStreamPacketizer2Pkg>

Generics
TPD_G	time := 1 ns
NUM_VC_G	integer range 1 to 16 := 4
ALIGN_SLIP_WAIT_G	integer := 32

Ports
pgpRxClk	in	sl
pgpRxRst	in	sl
pgpRxIn	in	Pgp3RxInType := PGP3_RX_IN_INIT_C
pgpRxOut	out	Pgp3RxOutType
pgpRxMasters	out	AxiStreamMasterArray ( NUM_VC_G- 1 downto 0 )
pgpRxCtrl	in	AxiStreamCtrlArray ( NUM_VC_G- 1 downto 0 )
remRxFifoCtrl	out	AxiStreamCtrlArray ( NUM_VC_G- 1 downto 0 )
remRxLinkReady	out	sl
locRxLinkReady	out	sl
phyRxClk	in	sl
phyRxRst	in	sl
phyRxInit	out	sl
phyRxActive	in	sl
phyRxValid	in	sl
phyRxHeader	in	slv ( 1 downto 0 )
phyRxData	in	slv ( 63 downto 0 )
phyRxStartSeq	in	sl
phyRxSlip	out	sl

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/Pgp3Rx.vhd
• protocols/pgp/pgp3/core/rtl/Pgp3Rx.vhd