SURF
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Pgp2bTxCell Entity Reference
+ Inheritance diagram for Pgp2bTxCell:

Entities

Pgp2bTxCell.Pgp2bTxCell  architecture
 

Libraries

ieee 
surf 

Use Clauses

std_logic_1164 
std_logic_arith 
std_logic_unsigned 
StdRtlPkg  Package <StdRtlPkg>
Pgp2bPkg  Package <Pgp2bPkg>

Generics

TPD_G  time := 1 ns
TX_LANE_CNT_G  integer range 1 to 2 := 1
PAYLOAD_CNT_TOP_G  integer := 7

Ports

pgpTxClkEn   in   sl := ' 1 '
pgpTxClk   in   sl
pgpTxClkRst   in   sl
pgpTxLinkReady   in   sl
cellTxSOC   out   sl := ' 0 '
cellTxSOF   out   sl := ' 0 '
cellTxEOC   out   sl := ' 0 '
cellTxEOF   out   sl := ' 0 '
cellTxEOFE   out   sl := ' 0 '
cellTxData   out   slv ( TX_LANE_CNT_G* 16 - 1 downto 0 ) := ( others = > ' 0 ' )
schTxSOF   out   sl := ' 0 '
schTxEOF   out   sl := ' 0 '
schTxIdle   in   sl
schTxReq   in   sl
schTxAck   out   sl
schTxTimeout   in   sl
schTxDataVc   in   slv ( 1 downto 0 )
vc0FrameTxValid   in   sl
vc0FrameTxReady   out   sl
vc0FrameTxSOF   in   sl
vc0FrameTxEOF   in   sl
vc0FrameTxEOFE   in   sl
vc0FrameTxData   in   slv ( TX_LANE_CNT_G* 16 - 1 downto 0 )
vc0LocAlmostFull   in   sl
vc0LocOverflow   in   sl
vc0RemAlmostFull   in   sl
vc1FrameTxValid   in   sl
vc1FrameTxReady   out   sl
vc1FrameTxSOF   in   sl
vc1FrameTxEOF   in   sl
vc1FrameTxEOFE   in   sl
vc1FrameTxData   in   slv ( TX_LANE_CNT_G* 16 - 1 downto 0 )
vc1LocAlmostFull   in   sl
vc1LocOverflow   in   sl
vc1RemAlmostFull   in   sl
vc2FrameTxValid   in   sl
vc2FrameTxReady   out   sl
vc2FrameTxSOF   in   sl
vc2FrameTxEOF   in   sl
vc2FrameTxEOFE   in   sl
vc2FrameTxData   in   slv ( TX_LANE_CNT_G* 16 - 1 downto 0 )
vc2LocAlmostFull   in   sl
vc2LocOverflow   in   sl
vc2RemAlmostFull   in   sl
vc3FrameTxValid   in   sl
vc3FrameTxReady   out   sl
vc3FrameTxSOF   in   sl
vc3FrameTxEOF   in   sl
vc3FrameTxEOFE   in   sl
vc3FrameTxData   in   slv ( TX_LANE_CNT_G* 16 - 1 downto 0 )
vc3LocAlmostFull   in   sl
vc3LocOverflow   in   sl
vc3RemAlmostFull   in   sl
crcTxIn   out   slv ( TX_LANE_CNT_G* 16 - 1 downto 0 )
crcTxInit   out   sl
crcTxValid   out   sl
crcTxOut   in   slv ( 31 downto 0 )

The documentation for this design unit was generated from the following file: