MdioCore.MdioCoreImpl Architecture Reference

Architecture >> MdioCore::MdioCoreImpl

Processes
COMB	( cmd , mdi , r , trg )
SEQ	( clk )
COMB	( cmd , mdi , r , trg )
SEQ	( clk )

Constants
DIV_BITS_C	positive := bitSize ( DIV_G- 1 )
REG_INIT_C	RegType := ( dataOut = > ( others = > ' 1 ' ) , din = > ( others = > ' 0 ' ) , count = > ( others = > ' 1 ' ) , div = > ( others = > ' 0 ' ) , tri = > ' 1 ' , mdc = > ' 0 ' , don = > ' 0 ' , state = > IDLE )

Types
State	( IDLE , RUN )

Signals
r	RegType := REG_INIT_C
rin	RegType

Records
RegType

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/MdioCore.vhd
• protocols/mdio/rtl/MdioCore.vhd