LineCode8b10bTb Entity Reference

Inheritance diagram for LineCode8b10bTb:

Collaboration diagram for LineCode8b10bTb:

Entities
LineCode8b10bTb.mapping	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
StdRtlPkg	Package <StdRtlPkg>

Generics
TPD_G	time := 1 ns
NUM_BYTES_G	positive := 1

Ports
clk	in	sl
rst	in	sl
validIn	in	sl
dataIn	in	slv ( NUM_BYTES_G* 8 - 1 downto 0 )
dataKIn	in	slv ( NUM_BYTES_G- 1 downto 0 )
validOut	out	sl
dataOut	out	slv ( NUM_BYTES_G* 8 - 1 downto 0 )
dataKOut	out	slv ( NUM_BYTES_G- 1 downto 0 )
codeErr	out	slv ( NUM_BYTES_G- 1 downto 0 )
dispErr	out	slv ( NUM_BYTES_G- 1 downto 0 )

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/LineCode8b10bTb.vhd
• protocols/line-codes/tb/LineCode8b10bTb.vhd