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LineCode10b12bTb Entity Reference
Inheritance diagram for LineCode10b12bTb: Collaboration diagram for LineCode10b12bTb:Entities | |
| LineCode10b12bTb.mapping | architecture |
Libraries | |
| ieee | |
| surf | |
Use Clauses | |
| std_logic_1164 | |
| StdRtlPkg | Package <StdRtlPkg> |
Generics | |
| TPD_G | time := 1 ns |
Ports | ||
| clk | in | sl |
| rst | in | sl |
| validIn | in | sl |
| dataIn | in | slv ( 9 downto 0 ) |
| dataKIn | in | sl |
| validOut | out | sl |
| dataOut | out | slv ( 9 downto 0 ) |
| dataKOut | out | sl |
| codeErr | out | sl |
| dispErr | out | sl |
The documentation for this design unit was generated from the following files:
- build/SRC_VHDL/surf/LineCode10b12bTb.vhd
- protocols/line-codes/tb/LineCode10b12bTb.vhd
