JesdSyncFsmTx.rtl Architecture Reference

Architecture >> JesdSyncFsmTx::rtl

Processes
comb	( enable_i , gtTxReady_i , lmfc_i , nSync_i , r , rst , subClass_i , sysRef_i )
seq	( clk )

Constants
REG_INIT_C	RegType := ( dataValid = > ' 0 ' , ila = > ' 0 ' , sysref = > ' 0 ' , cnt = > ( others = > ' 0 ' ) , state = > IDLE_S )

Types
StateType	( IDLE_S , SYNC_S , ILA_S , DATA_S )

Signals
r	RegType := REG_INIT_C
rin	RegType

Records
RegType

---

The documentation for this design unit was generated from the following file:

• protocols/jesd204b/rtl/JesdSyncFsmTx.vhd