IpV4Engine Entity Reference

Inheritance diagram for IpV4Engine:

Collaboration diagram for IpV4Engine:

Entities
IpV4Engine.mapping	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
StdRtlPkg	Package <StdRtlPkg>
AxiStreamPkg	Package <AxiStreamPkg>
EthMacPkg	Package <EthMacPkg>

Generics
TPD_G	time := 1 ns
PROTOCOL_SIZE_G	positive := 1
PROTOCOL_G	Slv8Array := ( 0 = > UDP_C )
CLIENT_SIZE_G	positive := 1
CLK_FREQ_G	real := 156 . 25E + 06
TTL_G	slv ( 7 downto 0 ) := x " 20 "
IGMP_G	boolean := false
IGMP_GRP_SIZE	positive := 1

Ports
localMac	in	slv ( 47 downto 0 )
localIp	in	slv ( 31 downto 0 )
igmpIp	in	Slv32Array ( IGMP_GRP_SIZE- 1 downto 0 )
obMacMaster	in	AxiStreamMasterType
obMacSlave	out	AxiStreamSlaveType
ibMacMaster	out	AxiStreamMasterType
ibMacSlave	in	AxiStreamSlaveType
obProtocolMasters	in	AxiStreamMasterArray ( PROTOCOL_SIZE_G- 1 downto 0 )
obProtocolSlaves	out	AxiStreamSlaveArray ( PROTOCOL_SIZE_G- 1 downto 0 )
ibProtocolMasters	out	AxiStreamMasterArray ( PROTOCOL_SIZE_G- 1 downto 0 )
ibProtocolSlaves	in	AxiStreamSlaveArray ( PROTOCOL_SIZE_G- 1 downto 0 )
arpReqMasters	in	AxiStreamMasterArray ( CLIENT_SIZE_G- 1 downto 0 )
arpReqSlaves	out	AxiStreamSlaveArray ( CLIENT_SIZE_G- 1 downto 0 )
arpAckMasters	out	AxiStreamMasterArray ( CLIENT_SIZE_G- 1 downto 0 )
arpAckSlaves	in	AxiStreamSlaveArray ( CLIENT_SIZE_G- 1 downto 0 )
clk	in	sl
rst	in	sl

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The documentation for this design unit was generated from the following file:

• ethernet/IpV4Engine/rtl/IpV4Engine.vhd