I2cRegMasterMux.rtl Architecture Reference

Architecture >> I2cRegMasterMux::rtl

Processes
comb	( lockReq , masterOut , r , regIn , srst )
seq	( arst , clk )
comb	( lockReq , masterOut , r , regIn , srst )
seq	( arst , clk )

Constants
REG_INIT_C	RegType := ( locked = > ' 0 ' , sel = > ( others = > ' 0 ' ) , regOut = > ( others = > I2C_REG_MASTER_OUT_INIT_C ) , masterIn = > I2C_REG_MASTER_IN_INIT_C )

Signals
r	RegType := REG_INIT_C
rin	RegType

Records
RegType

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/I2cRegMasterMux.vhd
• protocols/i2c/rtl/I2cRegMasterMux.vhd