HammingEccDecoder.rtl Architecture Reference

Architecture >> HammingEccDecoder::rtl

Processes
comb	( ibData , ibValid , obReady , r , rst )
seq	( clk , rst )
comb	( ibData , ibValid , obReady , r , rst )
seq	( clk , rst )

Constants
IB_DATA_WIDTH_C	positive := hammingEccDataWidth ( DATA_WIDTH_G )
REG_INIT_C	RegType := ( ibReady = > ' 0 ' , obValid = > ' 0 ' , obData = > ( others = > ' 0 ' ) , obErrSbit = > ' 0 ' , obErrDbit = > ' 0 ' )

Signals
r	RegType := REG_INIT_C
rin	RegType

Records
RegType

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/HammingEccDecoder.vhd
• protocols/hamming-ecc/rtl/HammingEccDecoder.vhd