Gtp7RxRstSeq Entity Reference

Inheritance diagram for Gtp7RxRstSeq:

Collaboration diagram for Gtp7RxRstSeq:

Entities
Gtp7RxRstSeq.Behavioral	architecture

Libraries
ieee

Use Clauses
std_logic_1164
numeric_std

Generics
TPD_G	time := 1 ns

Ports
DRP_OVERRIDE	in	std_logic
RST_IN	in	std_logic
GTRXRESET_IN	in	std_logic
RXPMARESETDONE	in	std_logic
GTRXRESET_OUT	out	std_logic
DRPCLK	in	std_logic
DRPADDR	out	std_logic_vector ( 8 downto 0 )
DRPDO	in	std_logic_vector ( 15 downto 0 )
DRPDI	out	std_logic_vector ( 15 downto 0 )
DRPRDY	in	std_logic
DRPEN	out	std_logic
DRPWE	out	std_logic
DRP_OP_DONE	out	std_logic

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The documentation for this design unit was generated from the following file:

• xilinx/7Series/gtp7/rtl/Gtp7RxRstSeq.vhd