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GLinkEncoder.rtl Architecture Reference
Architecture >> GLinkEncoder::rtl

Functions

signed   disparity ( vec: in slv( 19 downto 0) )

Processes

comb  ( gLinkTx , r , rst )
seq  ( clk , rst )

Constants

REG_INIT_C  RegType := ( ' 0 ' , ( GLINK_IDLE_WORD_FF0_C& GLINK_CONTROL_WORD_C ) , ( others = > ' 0 ' ) )

Signals

r  RegType := REG_INIT_C
rin  RegType

Records

RegType 

The documentation for this design unit was generated from the following file: