EthMacTxRoCEv2 Entity Reference

Inheritance diagram for EthMacTxRoCEv2:

Collaboration diagram for EthMacTxRoCEv2:

Entities
EthMacTxRoCEv2.mapping	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
std_logic_arith
std_logic_unsigned
AxiStreamPkg	Package <AxiStreamPkg>
StdRtlPkg	Package <StdRtlPkg>
EthMacPkg	Package <EthMacPkg>

Generics
TPD_G	time := 1 ns
RST_POLARITY_G	sl := ' 1 '

Ports
ethClk	in	sl
ethRst	in	sl
obCsumMaster	in	AxiStreamMasterType
obCsumSlave	out	AxiStreamSlaveType
ibPauseMaster	out	AxiStreamMasterType
ibPauseSlave	in	AxiStreamSlaveType

---

The documentation for this design unit was generated from the following file:

• ethernet/RoCEv2/rtl/EthMacTxRoCEv2.vhd