EthMacTxFifo Entity Reference

Inheritance diagram for EthMacTxFifo:

Collaboration diagram for EthMacTxFifo:

Entities
EthMacTxFifo.mapping	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
StdRtlPkg	Package <StdRtlPkg>
AxiStreamPkg	Package <AxiStreamPkg>
EthMacPkg	Package <EthMacPkg>

Generics
TPD_G	time := 1 ns
RST_POLARITY_G	sl := ' 1 '
PRIM_COMMON_CLK_G	boolean := false
PRIM_CONFIG_G	AxiStreamConfigType := INT_EMAC_AXIS_CONFIG_C
BYP_EN_G	boolean := false
BYP_COMMON_CLK_G	boolean := false
BYP_CONFIG_G	AxiStreamConfigType := INT_EMAC_AXIS_CONFIG_C
SYNTH_MODE_G	string := " inferred "

Ports
mClk	in	sl
mRst	in	sl
sPrimClk	in	sl
sPrimRst	in	sl
sPrimMaster	in	AxiStreamMasterType
sPrimSlave	out	AxiStreamSlaveType
mPrimMaster	out	AxiStreamMasterType
mPrimSlave	in	AxiStreamSlaveType
sBypClk	in	sl
sBypRst	in	sl
sBypMaster	in	AxiStreamMasterType
sBypSlave	out	AxiStreamSlaveType
mBypMaster	out	AxiStreamMasterType
mBypSlave	in	AxiStreamSlaveType

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The documentation for this design unit was generated from the following file:

• ethernet/EthMacCore/rtl/EthMacTxFifo.vhd