EthMacTxExport Entity Reference

Inheritance diagram for EthMacTxExport:

Collaboration diagram for EthMacTxExport:

Entities
EthMacTxExport.mapping	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
std_logic_arith
std_logic_unsigned
AxiStreamPkg	Package <AxiStreamPkg>
StdRtlPkg	Package <StdRtlPkg>

Generics
TPD_G	time := 1 ns
RST_POLARITY_G	sl := ' 1 '
PHY_TYPE_G	string := " XGMII "
SYNTH_MODE_G	string := " inferred "

Ports
ethClkEn	in	sl
ethClk	in	sl
ethRst	in	sl
macObMaster	in	AxiStreamMasterType
macObSlave	out	AxiStreamSlaveType
xlgmiiTxd	out	slv ( 127 downto 0 )
xlgmiiTxc	out	slv ( 15 downto 0 )
xgmiiTxd	out	slv ( 63 downto 0 )
xgmiiTxc	out	slv ( 7 downto 0 )
gmiiTxEn	out	sl
gmiiTxEr	out	sl
gmiiTxd	out	slv ( 7 downto 0 )
phyReady	in	sl
txCountEn	out	sl
txUnderRun	out	sl
txLinkNotReady	out	sl

---

The documentation for this design unit was generated from the following file:

• ethernet/EthMacCore/rtl/EthMacTxExport.vhd