EthMacRxImport Entity Reference

Inheritance diagram for EthMacRxImport:

Collaboration diagram for EthMacRxImport:

Entities
EthMacRxImport.mapping	architecture

Libraries
ieee
surf

Use Clauses
std_logic_1164
std_logic_arith
std_logic_unsigned
AxiStreamPkg	Package <AxiStreamPkg>
StdRtlPkg	Package <StdRtlPkg>
EthMacPkg	Package <EthMacPkg>

Generics
TPD_G	time := 1 ns
RST_POLARITY_G	sl := ' 1 '
PHY_TYPE_G	string := " XGMII "
SYNTH_MODE_G	string := " inferred "

Ports
ethClkEn	in	sl
ethClk	in	sl
ethRst	in	sl
macIbMaster	out	AxiStreamMasterType
xlgmiiRxd	in	slv ( 127 downto 0 )
xlgmiiRxc	in	slv ( 15 downto 0 )
xgmiiRxd	in	slv ( 63 downto 0 )
xgmiiRxc	in	slv ( 7 downto 0 )
gmiiRxDv	in	sl
gmiiRxEr	in	sl
gmiiRxd	in	slv ( 7 downto 0 )
phyReady	in	sl
rxCountEn	out	sl
rxCrcError	out	sl

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The documentation for this design unit was generated from the following file:

• ethernet/EthMacCore/rtl/EthMacRxImport.vhd