CoaxpressOverFiberGthUsQpll Entity Reference

Inheritance diagram for CoaxpressOverFiberGthUsQpll:

Collaboration diagram for CoaxpressOverFiberGthUsQpll:

Entities
CoaxpressOverFiberGthUsQpll.mapping	architecture

Libraries
ieee
surf
unisim

Use Clauses
std_logic_1164
StdRtlPkg	Package <StdRtlPkg>
vcomponents

Generics
TPD_G	time := 1 ns
EXT_REF_G	boolean := false
QPLL_REFCLK_SEL_G	slv ( 2 downto 0 ) := " 001 "

Ports
gtRefClk	in	sl := ' 0 '
gtRefClkBufg	in	sl := ' 0 '
gtClkP	in	sl := ' 1 '
gtClkN	in	sl := ' 0 '
coreClk	out	sl
coreRst	in	sl := ' 0 '
gtClk	out	sl
qplllock	out	slv ( 1 downto 0 )
qplloutclk	out	slv ( 1 downto 0 )
qplloutrefclk	out	slv ( 1 downto 0 )
qpllRst	in	slv ( 1 downto 0 )

---

The documentation for this design unit was generated from the following file:

• protocols/coaxpress/gthUs/rtl/CoaxpressOverFiberGthUsQpll.vhd