ClkOutBufSingle.rtl Architecture Reference

Architecture >> ClkOutBufSingle::rtl

Signals
clkDdr	sl
rst	sl

Instantiations
oddr_i	oddr
oddr_i	oddre1
obuft_i	obuft

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The documentation for this design unit was generated from the following file:

• xilinx/general/rtl/ClkOutBufSingle.vhd