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ClinkUartThrottle Entity Reference
Inheritance diagram for ClinkUartThrottle:Entities | |
| ClinkUartThrottle.rtl | architecture |
Libraries | |
| ieee | |
| surf | |
Use Clauses | |
| std_logic_1164 | |
| std_logic_arith | |
| std_logic_unsigned | |
| StdRtlPkg | Package <StdRtlPkg> |
| AxiStreamPkg | Package <AxiStreamPkg> |
| SsiPkg | Package <SsiPkg> |
Generics | |
| TPD_G | time := 1 ns |
Ports | ||
| intClk | in | sl |
| intRst | in | sl |
| throttle | in | slv ( 15 downto 0 ) |
| sUartMaster | in | AxiStreamMasterType |
| sUartSlave | out | AxiStreamSlaveType |
| mUartMaster | out | AxiStreamMasterType |
| mUartSlave | in | AxiStreamSlaveType |
The documentation for this design unit was generated from the following file:
- protocols/clink/rtl/ClinkUartThrottle.vhd
