AxiStreamFlush.rtl Architecture Reference

Architecture >> AxiStreamFlush::rtl

Processes
comb	( axisRst , flushEn , mAxisCtrl , r , sAxisMaster )
seq	( axisClk , axisRst )
comb	( axisRst , flushEn , mAxisCtrl , r , sAxisMaster )
seq	( axisClk , axisRst )

Constants
REG_INIT_C	RegType := ( state = > IDLE_S , obMaster = > axiStreamMasterInit ( AXIS_CONFIG_G ) , ibSlave = > AXI_STREAM_SLAVE_INIT_C )

Types
StateType	( IDLE_S , MOVE_S , FLUSH_S )

Signals
r	RegType := REG_INIT_C
rin	RegType

Records
RegType

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The documentation for this design unit was generated from the following files:

• axi/axi-stream/rtl/AxiStreamFlush.vhd
• build/SRC_VHDL/surf/AxiStreamFlush.vhd