AxiStreamBytePackerTbRx.rtl Architecture Reference

Architecture >> AxiStreamBytePackerTbRx::rtl

Processes
comb	( axiRst , r , sAxisMaster )
seq	( axiClk )
comb	( axiRst , r , sAxisMaster )
seq	( axiClk )

Constants
REG_INIT_C	RegType := ( byteCount = > 0 , frameCount = > 0 , fail = > ' 0 ' )

Signals
r	RegType := REG_INIT_C
rin	RegType

Records
RegType

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The documentation for this design unit was generated from the following files:

• build/SRC_VHDL/surf/AxiStreamBytePackerTbRx.vhd
• protocols/packetizer/tb/AxiStreamBytePackerTbRx.vhd