SURF  1.0
structural Architecture Reference

Processes

shift_register  ( clk , nReset )
data_cnt  ( clk , nReset )
nxt_state_decoder  ( clk , nReset )

Components

i2c_master_bit_ctrl  <Entity i2c_master_bit_ctrl>

Constants

I2C_CMD_NOP  std_logic_vector ( 3 downto 0 ) := " 0000 "
I2C_CMD_START  std_logic_vector ( 3 downto 0 ) := " 0001 "
I2C_CMD_STOP  std_logic_vector ( 3 downto 0 ) := " 0010 "
I2C_CMD_READ  std_logic_vector ( 3 downto 0 ) := " 0100 "
I2C_CMD_WRITE  std_logic_vector ( 3 downto 0 ) := " 1000 "

Types

states ( st_idle , st_start , st_read , st_write , st_ack , st_stop )

Signals

core_cmd  std_logic_vector ( 3 downto 0 )
core_ack  std_logic
core_txd  std_logic
core_rxd  std_logic
al  std_logic
sr  std_logic_vector ( 7 downto 0 )
shift  std_logic
ld  std_logic
go  std_logic
host_ack  std_logic
dcnt  std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
cnt_done  std_logic
c_state  states

Instantiations

bit_ctrl  i2c_master_bit_ctrl <Entity i2c_master_bit_ctrl>

Detailed Description

Definition at line 121 of file i2c_master_byte_ctrl.vhd.

Member Function Documentation

◆ shift_register()

shift_register (   clk,
  nReset 
)

Definition at line 217 of file i2c_master_byte_ctrl.vhd.

◆ data_cnt()

data_cnt (   clk ,
  nReset  
)
Process

Definition at line 233 of file i2c_master_byte_ctrl.vhd.

◆ nxt_state_decoder()

nxt_state_decoder (   clk ,
  nReset  
)
Process

Definition at line 260 of file i2c_master_byte_ctrl.vhd.

Member Data Documentation

◆ i2c_master_bit_ctrl

Definition at line 122 of file i2c_master_byte_ctrl.vhd.

◆ I2C_CMD_NOP

I2C_CMD_NOP std_logic_vector ( 3 downto 0 ) := " 0000 "
Constant

Definition at line 153 of file i2c_master_byte_ctrl.vhd.

◆ I2C_CMD_START

I2C_CMD_START std_logic_vector ( 3 downto 0 ) := " 0001 "
Constant

Definition at line 154 of file i2c_master_byte_ctrl.vhd.

◆ I2C_CMD_STOP

I2C_CMD_STOP std_logic_vector ( 3 downto 0 ) := " 0010 "
Constant

Definition at line 155 of file i2c_master_byte_ctrl.vhd.

◆ I2C_CMD_READ

I2C_CMD_READ std_logic_vector ( 3 downto 0 ) := " 0100 "
Constant

Definition at line 156 of file i2c_master_byte_ctrl.vhd.

◆ I2C_CMD_WRITE

I2C_CMD_WRITE std_logic_vector ( 3 downto 0 ) := " 1000 "
Constant

Definition at line 157 of file i2c_master_byte_ctrl.vhd.

◆ core_cmd

core_cmd std_logic_vector ( 3 downto 0 )
Signal

Definition at line 160 of file i2c_master_byte_ctrl.vhd.

◆ core_ack

core_ack std_logic
Signal

Definition at line 161 of file i2c_master_byte_ctrl.vhd.

◆ core_txd

core_txd std_logic
Signal

Definition at line 161 of file i2c_master_byte_ctrl.vhd.

◆ core_rxd

core_rxd std_logic
Signal

Definition at line 161 of file i2c_master_byte_ctrl.vhd.

◆ al

al std_logic
Signal

Definition at line 162 of file i2c_master_byte_ctrl.vhd.

◆ sr

sr std_logic_vector ( 7 downto 0 )
Signal

Definition at line 165 of file i2c_master_byte_ctrl.vhd.

◆ shift

shift std_logic
Signal

Definition at line 166 of file i2c_master_byte_ctrl.vhd.

◆ ld

ld std_logic
Signal

Definition at line 166 of file i2c_master_byte_ctrl.vhd.

◆ go

go std_logic
Signal

Definition at line 169 of file i2c_master_byte_ctrl.vhd.

◆ host_ack

host_ack std_logic
Signal

Definition at line 169 of file i2c_master_byte_ctrl.vhd.

◆ dcnt

dcnt std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
Signal

Definition at line 178 of file i2c_master_byte_ctrl.vhd.

◆ cnt_done

cnt_done std_logic
Signal

Definition at line 179 of file i2c_master_byte_ctrl.vhd.

◆ states

states ( st_idle , st_start , st_read , st_write , st_ack , st_stop )
Type

Definition at line 254 of file i2c_master_byte_ctrl.vhd.

◆ c_state

c_state states
Signal

Definition at line 255 of file i2c_master_byte_ctrl.vhd.

◆ bit_ctrl

bit_ctrl i2c_master_bit_ctrl
Instantiation

Definition at line 204 of file i2c_master_byte_ctrl.vhd.


The documentation for this class was generated from the following file: