SURF  1.0
Generics | Ports | Libraries | Use Clauses
SyncClockFreq Entity Reference
base » sync
+ Inheritance diagram for SyncClockFreq:
+ Collaboration diagram for SyncClockFreq:

Entities

rtl  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
std_logic_unsigned 
std_logic_arith 
StdRtlPkg  Package <StdRtlPkg>

Generics

TPD_G  time := 1 ns
USE_DSP48_G  string := " no "
REF_CLK_FREQ_G  real := 200 . 0E + 6
REFRESH_RATE_G  real := 1 . 0E + 3
CLK_LOWER_LIMIT_G  real := 159 . 0E + 6
CLK_UPPER_LIMIT_G  real := 161 . 0E + 6
CNT_WIDTH_G  positive := 32

Ports

freqOut   out slv ( CNT_WIDTH_G - 1 downto 0 )
freqUpdated   out sl
locked   out sl
tooFast   out sl
tooSlow   out sl
clkIn   in sl
locClk   in sl
refClk   in sl

Detailed Description

See also
entity

Definition at line 28 of file SyncClockFreq.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 30 of file SyncClockFreq.vhd.

◆ USE_DSP48_G

USE_DSP48_G string := " no "
Generic

Definition at line 31 of file SyncClockFreq.vhd.

◆ REF_CLK_FREQ_G

REF_CLK_FREQ_G real := 200 . 0E + 6
Generic

Definition at line 32 of file SyncClockFreq.vhd.

◆ REFRESH_RATE_G

REFRESH_RATE_G real := 1 . 0E + 3
Generic

Definition at line 33 of file SyncClockFreq.vhd.

◆ CLK_LOWER_LIMIT_G

CLK_LOWER_LIMIT_G real := 159 . 0E + 6
Generic

Definition at line 34 of file SyncClockFreq.vhd.

◆ CLK_UPPER_LIMIT_G

CLK_UPPER_LIMIT_G real := 161 . 0E + 6
Generic

Definition at line 35 of file SyncClockFreq.vhd.

◆ CNT_WIDTH_G

CNT_WIDTH_G positive := 32
Generic

Definition at line 36 of file SyncClockFreq.vhd.

◆ freqOut

freqOut out slv ( CNT_WIDTH_G - 1 downto 0 )
Port

Definition at line 39 of file SyncClockFreq.vhd.

◆ freqUpdated

freqUpdated out sl
Port

Definition at line 40 of file SyncClockFreq.vhd.

◆ locked

locked out sl
Port

Definition at line 41 of file SyncClockFreq.vhd.

◆ tooFast

tooFast out sl
Port

Definition at line 42 of file SyncClockFreq.vhd.

◆ tooSlow

tooSlow out sl
Port

Definition at line 43 of file SyncClockFreq.vhd.

◆ clkIn

clkIn in sl
Port

Definition at line 45 of file SyncClockFreq.vhd.

◆ locClk

locClk in sl
Port

Definition at line 46 of file SyncClockFreq.vhd.

◆ refClk

refClk in sl
Port

Definition at line 47 of file SyncClockFreq.vhd.

◆ ieee

ieee
Library

Definition at line 19 of file SyncClockFreq.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 20 of file SyncClockFreq.vhd.

◆ std_logic_unsigned

std_logic_unsigned
Package

Definition at line 21 of file SyncClockFreq.vhd.

◆ std_logic_arith

std_logic_arith
Package

Definition at line 22 of file SyncClockFreq.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 24 of file SyncClockFreq.vhd.

The documentation for this class was generated from the following file: