SURF  1.0
Generics | Ports | Libraries | Use Clauses
SsiSem Entity Reference
xilinx » 7Series » sem
+ Inheritance diagram for SsiSem:
+ Collaboration diagram for SsiSem:

Entities

rtl  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
std_logic_unsigned 
std_logic_arith 
StdRtlPkg  Package <StdRtlPkg>
TextUtilPkg  Package <TextUtilPkg>
AxiLitePkg  Package <AxiLitePkg>
AxiStreamPkg  Package <AxiStreamPkg>
SsiPkg  Package <SsiPkg>
SemPkg  Package <SemPkg>

Generics

TPD_G  time := 1 ns
AXI_ERROR_RESP_G  slv ( 1 downto 0 ) := AXI_RESP_SLVERR_C
COMMON_AXIL_CLK_G  boolean := false
COMMON_AXIS_CLK_G  boolean := false
SLAVE_AXI_CONFIG_G  AxiStreamConfigType := ssiAxiStreamConfig ( 1 )
MASTER_AXI_CONFIG_G  AxiStreamConfigType := ssiAxiStreamConfig ( 1 )

Ports

semClk   in sl
semRst   in sl
fpgaReload   in sl := ' 0 '
fpgaReloadAddr   in slv ( 31 downto 0 ) := ( others = > ' 0 ' )
axilClk   in sl
axilRst   in sl
axilReadMaster   in AxiLiteReadMasterType
axilReadSlave   out AxiLiteReadSlaveType
axilWriteMaster   in AxiLiteWriteMasterType
axilWriteSlave   out AxiLiteWriteSlaveType
moduleIndex   in slv ( 3 downto 0 ) := x " 0 "
axisClk   in sl
axisRst   in sl
semObAxisMaster   out AxiStreamMasterType
semObAxisSlave   in AxiStreamSlaveType
semIbAxisMaster   in AxiStreamMasterType
semIbAxisSlave   out AxiStreamSlaveType

Detailed Description

See also
entity

Definition at line 32 of file SsiSem.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 34 of file SsiSem.vhd.

◆ AXI_ERROR_RESP_G

AXI_ERROR_RESP_G slv ( 1 downto 0 ) := AXI_RESP_SLVERR_C
Generic

Definition at line 35 of file SsiSem.vhd.

◆ COMMON_AXIL_CLK_G

COMMON_AXIL_CLK_G boolean := false
Generic

Definition at line 36 of file SsiSem.vhd.

◆ COMMON_AXIS_CLK_G

COMMON_AXIS_CLK_G boolean := false
Generic

Definition at line 37 of file SsiSem.vhd.

◆ SLAVE_AXI_CONFIG_G

SLAVE_AXI_CONFIG_G AxiStreamConfigType := ssiAxiStreamConfig ( 1 )
Generic

Definition at line 38 of file SsiSem.vhd.

◆ MASTER_AXI_CONFIG_G

MASTER_AXI_CONFIG_G AxiStreamConfigType := ssiAxiStreamConfig ( 1 )
Generic

Definition at line 39 of file SsiSem.vhd.

◆ semClk

semClk in sl
Port

Definition at line 42 of file SsiSem.vhd.

◆ semRst

semRst in sl
Port

Definition at line 43 of file SsiSem.vhd.

◆ fpgaReload

fpgaReload in sl := ' 0 '
Port

Definition at line 45 of file SsiSem.vhd.

◆ fpgaReloadAddr

fpgaReloadAddr in slv ( 31 downto 0 ) := ( others = > ' 0 ' )
Port

Definition at line 46 of file SsiSem.vhd.

◆ axilClk

axilClk in sl
Port

Definition at line 48 of file SsiSem.vhd.

◆ axilRst

axilRst in sl
Port

Definition at line 49 of file SsiSem.vhd.

◆ axilReadMaster

axilReadMaster in AxiLiteReadMasterType
Port

Definition at line 50 of file SsiSem.vhd.

◆ axilReadSlave

axilReadSlave out AxiLiteReadSlaveType
Port

Definition at line 51 of file SsiSem.vhd.

◆ axilWriteMaster

axilWriteMaster in AxiLiteWriteMasterType
Port

Definition at line 52 of file SsiSem.vhd.

◆ axilWriteSlave

axilWriteSlave out AxiLiteWriteSlaveType
Port

Definition at line 53 of file SsiSem.vhd.

◆ moduleIndex

moduleIndex in slv ( 3 downto 0 ) := x " 0 "
Port

Definition at line 54 of file SsiSem.vhd.

◆ axisClk

axisClk in sl
Port

Definition at line 56 of file SsiSem.vhd.

◆ axisRst

axisRst in sl
Port

Definition at line 57 of file SsiSem.vhd.

◆ semObAxisMaster

semObAxisMaster out AxiStreamMasterType
Port

Definition at line 58 of file SsiSem.vhd.

◆ semObAxisSlave

semObAxisSlave in AxiStreamSlaveType
Port

Definition at line 59 of file SsiSem.vhd.

◆ semIbAxisMaster

semIbAxisMaster in AxiStreamMasterType
Port

Definition at line 60 of file SsiSem.vhd.

◆ semIbAxisSlave

semIbAxisSlave out AxiStreamSlaveType
Port

Definition at line 61 of file SsiSem.vhd.

◆ ieee

ieee
Library

Definition at line 18 of file SsiSem.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 19 of file SsiSem.vhd.

◆ std_logic_unsigned

std_logic_unsigned
Package

Definition at line 20 of file SsiSem.vhd.

◆ std_logic_arith

std_logic_arith
Package

Definition at line 21 of file SsiSem.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 23 of file SsiSem.vhd.

◆ TextUtilPkg

TextUtilPkg
Package

Definition at line 24 of file SsiSem.vhd.

◆ AxiLitePkg

AxiLitePkg
Package

Definition at line 25 of file SsiSem.vhd.

◆ AxiStreamPkg

AxiStreamPkg
Package

Definition at line 26 of file SsiSem.vhd.

◆ SsiPkg

SsiPkg
Package

Definition at line 27 of file SsiSem.vhd.

◆ SemPkg

SemPkg
Package

Definition at line 28 of file SsiSem.vhd.

The documentation for this class was generated from the following file: