SURF  1.0
SsiFifo Entity Reference
+ Inheritance diagram for SsiFifo:
+ Collaboration diagram for SsiFifo:

Entities

mapping  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
StdRtlPkg  Package <StdRtlPkg>
AxiStreamPkg  Package <AxiStreamPkg>
SsiPkg  Package <SsiPkg>

Generics

TPD_G  time := 1 ns
INT_PIPE_STAGES_G  natural := 0
PIPE_STAGES_G  natural := 1
SLAVE_READY_EN_G  boolean := true
EN_FRAME_FILTER_G  boolean := true
OR_DROP_FLAGS_G  boolean := false
VALID_THOLD_G  natural := 1
VALID_BURST_MODE_G  boolean := false
BRAM_EN_G  boolean := true
XIL_DEVICE_G  string := " 7SERIES "
USE_BUILT_IN_G  boolean := false
GEN_SYNC_FIFO_G  boolean := false
ALTERA_SYN_G  boolean := false
ALTERA_RAM_G  string := " M9K "
CASCADE_SIZE_G  positive := 1
CASCADE_PAUSE_SEL_G  natural := 0
FIFO_ADDR_WIDTH_G  integer range 4 to 48 := 9
FIFO_FIXED_THRESH_G  boolean := true
FIFO_PAUSE_THRESH_G  positive := 1
SLAVE_AXI_CONFIG_G  AxiStreamConfigType := SSI_CONFIG_INIT_C
MASTER_AXI_CONFIG_G  AxiStreamConfigType := SSI_CONFIG_INIT_C

Ports

sAxisClk   in sl
sAxisRst   in sl
sAxisMaster   in AxiStreamMasterType
sAxisSlave   out AxiStreamSlaveType
sAxisCtrl   out AxiStreamCtrlType
sAxisDropWrite   out sl
sAxisTermFrame   out sl
fifoPauseThresh   in slv ( FIFO_ADDR_WIDTH_G - 1 downto 0 ) := ( others = > ' 1 ' )
mAxisClk   in sl
mAxisRst   in sl
mAxisMaster   out AxiStreamMasterType
mAxisSlave   in AxiStreamSlaveType
mAxisDropWrite   out sl
mAxisTermFrame   out sl

Detailed Description

See also
entity

Definition at line 30 of file SsiFifo.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 33 of file SsiFifo.vhd.

◆ INT_PIPE_STAGES_G

INT_PIPE_STAGES_G natural := 0
Generic

Definition at line 34 of file SsiFifo.vhd.

◆ PIPE_STAGES_G

PIPE_STAGES_G natural := 1
Generic

Definition at line 35 of file SsiFifo.vhd.

◆ SLAVE_READY_EN_G

SLAVE_READY_EN_G boolean := true
Generic

Definition at line 36 of file SsiFifo.vhd.

◆ EN_FRAME_FILTER_G

EN_FRAME_FILTER_G boolean := true
Generic

Definition at line 37 of file SsiFifo.vhd.

◆ OR_DROP_FLAGS_G

OR_DROP_FLAGS_G boolean := false
Generic

Definition at line 38 of file SsiFifo.vhd.

◆ VALID_THOLD_G

VALID_THOLD_G natural := 1
Generic

Definition at line 39 of file SsiFifo.vhd.

◆ VALID_BURST_MODE_G

VALID_BURST_MODE_G boolean := false
Generic

Definition at line 40 of file SsiFifo.vhd.

◆ BRAM_EN_G

BRAM_EN_G boolean := true
Generic

Definition at line 42 of file SsiFifo.vhd.

◆ XIL_DEVICE_G

XIL_DEVICE_G string := " 7SERIES "
Generic

Definition at line 43 of file SsiFifo.vhd.

◆ USE_BUILT_IN_G

USE_BUILT_IN_G boolean := false
Generic

Definition at line 44 of file SsiFifo.vhd.

◆ GEN_SYNC_FIFO_G

GEN_SYNC_FIFO_G boolean := false
Generic

Definition at line 45 of file SsiFifo.vhd.

◆ ALTERA_SYN_G

ALTERA_SYN_G boolean := false
Generic

Definition at line 46 of file SsiFifo.vhd.

◆ ALTERA_RAM_G

ALTERA_RAM_G string := " M9K "
Generic

Definition at line 47 of file SsiFifo.vhd.

◆ CASCADE_SIZE_G

CASCADE_SIZE_G positive := 1
Generic

Definition at line 48 of file SsiFifo.vhd.

◆ CASCADE_PAUSE_SEL_G

CASCADE_PAUSE_SEL_G natural := 0
Generic

Definition at line 49 of file SsiFifo.vhd.

◆ FIFO_ADDR_WIDTH_G

FIFO_ADDR_WIDTH_G integer range 4 to 48 := 9
Generic

Definition at line 50 of file SsiFifo.vhd.

◆ FIFO_FIXED_THRESH_G

FIFO_FIXED_THRESH_G boolean := true
Generic

Definition at line 51 of file SsiFifo.vhd.

◆ FIFO_PAUSE_THRESH_G

FIFO_PAUSE_THRESH_G positive := 1
Generic

Definition at line 52 of file SsiFifo.vhd.

◆ SLAVE_AXI_CONFIG_G

Definition at line 54 of file SsiFifo.vhd.

◆ MASTER_AXI_CONFIG_G

◆ sAxisClk

sAxisClk in sl
Port

Definition at line 58 of file SsiFifo.vhd.

◆ sAxisRst

sAxisRst in sl
Port

Definition at line 59 of file SsiFifo.vhd.

◆ sAxisMaster

Definition at line 60 of file SsiFifo.vhd.

◆ sAxisSlave

Definition at line 61 of file SsiFifo.vhd.

◆ sAxisCtrl

Definition at line 62 of file SsiFifo.vhd.

◆ sAxisDropWrite

sAxisDropWrite out sl
Port

Definition at line 63 of file SsiFifo.vhd.

◆ sAxisTermFrame

sAxisTermFrame out sl
Port

Definition at line 64 of file SsiFifo.vhd.

◆ fifoPauseThresh

fifoPauseThresh in slv ( FIFO_ADDR_WIDTH_G - 1 downto 0 ) := ( others = > ' 1 ' )
Port

Definition at line 65 of file SsiFifo.vhd.

◆ mAxisClk

mAxisClk in sl
Port

Definition at line 67 of file SsiFifo.vhd.

◆ mAxisRst

mAxisRst in sl
Port

Definition at line 68 of file SsiFifo.vhd.

◆ mAxisMaster

Definition at line 69 of file SsiFifo.vhd.

◆ mAxisSlave

Definition at line 70 of file SsiFifo.vhd.

◆ mAxisDropWrite

mAxisDropWrite out sl
Port

Definition at line 71 of file SsiFifo.vhd.

◆ mAxisTermFrame

mAxisTermFrame out sl
Port

Definition at line 72 of file SsiFifo.vhd.

◆ ieee

ieee
Library

Definition at line 21 of file SsiFifo.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 22 of file SsiFifo.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 24 of file SsiFifo.vhd.

◆ AxiStreamPkg

AxiStreamPkg
Package

Definition at line 25 of file SsiFifo.vhd.

◆ SsiPkg

SsiPkg
Package

Definition at line 26 of file SsiFifo.vhd.


The documentation for this class was generated from the following file: