SURF  1.0
Generics | Ports | Libraries | Use Clauses
SsiDbgTap Entity Reference
protocols » ssi

Entities

rtl  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
std_logic_unsigned 
std_logic_arith 
StdRtlPkg  Package <StdRtlPkg>
AxiStreamPkg  Package <AxiStreamPkg>
SsiPkg  Package <SsiPkg>

Generics

TPD_G  time := 1 ns
CNT_WIDTH_G  positive := 16
AXI_CONFIG_G  AxiStreamConfigType := AXI_STREAM_CONFIG_INIT_C

Ports

axisClk   in sl
axisRst   in sl
axisMaster   in AxiStreamMasterType
axisSlave   in AxiStreamSlaveType

Detailed Description

See also
entity

Definition at line 29 of file SsiDbgTap.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 31 of file SsiDbgTap.vhd.

◆ CNT_WIDTH_G

CNT_WIDTH_G positive := 16
Generic

Definition at line 32 of file SsiDbgTap.vhd.

◆ AXI_CONFIG_G

AXI_CONFIG_G AxiStreamConfigType := AXI_STREAM_CONFIG_INIT_C
Generic

Definition at line 33 of file SsiDbgTap.vhd.

◆ axisClk

axisClk in sl
Port

Definition at line 36 of file SsiDbgTap.vhd.

◆ axisRst

axisRst in sl
Port

Definition at line 37 of file SsiDbgTap.vhd.

◆ axisMaster

axisMaster in AxiStreamMasterType
Port

Definition at line 38 of file SsiDbgTap.vhd.

◆ axisSlave

axisSlave in AxiStreamSlaveType
Port

Definition at line 39 of file SsiDbgTap.vhd.

◆ ieee

ieee
Library

Definition at line 18 of file SsiDbgTap.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 19 of file SsiDbgTap.vhd.

◆ std_logic_unsigned

std_logic_unsigned
Package

Definition at line 20 of file SsiDbgTap.vhd.

◆ std_logic_arith

std_logic_arith
Package

Definition at line 21 of file SsiDbgTap.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 23 of file SsiDbgTap.vhd.

◆ AxiStreamPkg

AxiStreamPkg
Package

Definition at line 24 of file SsiDbgTap.vhd.

◆ SsiPkg

SsiPkg
Package

Definition at line 25 of file SsiDbgTap.vhd.

The documentation for this class was generated from the following file: