SURF  1.0
PgpSimModel Entity Reference
+ Inheritance diagram for PgpSimModel:
+ Collaboration diagram for PgpSimModel:

Entities

PgpSimModel  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
std_logic_arith 
std_logic_unsigned 
StdRtlPkg  Package <StdRtlPkg>
Pgp2bPkg  Package <Pgp2bPkg>
AxiStreamPkg  Package <AxiStreamPkg>
SsiPkg  Package <SsiPkg>

Generics

TPD_G  time := 1 ns
LANE_CNT_G  integer range 1 to 2 := 1

Ports

pgpTxClk   in sl
pgpTxClkRst   in sl
pgpTxIn   in Pgp2bTxInType
pgpTxOut   out Pgp2bTxOutType
pgpTxMasters   in AxiStreamMasterArray ( 3 downto 0 )
pgpTxSlaves   out AxiStreamSlaveArray ( 3 downto 0 )
pgpRxClk   in sl
pgpRxClkRst   in sl
pgpRxIn   in Pgp2bRxInType
pgpRxOut   out Pgp2bRxOutType
pgpRxMasters   out AxiStreamMasterArray ( 3 downto 0 )
pgpRxMasterMuxed   out AxiStreamMasterType
pgpRxCtrl   in AxiStreamCtrlArray ( 3 downto 0 )

Detailed Description

See also
entity

Definition at line 30 of file PgpSimModel.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 32 of file PgpSimModel.vhd.

◆ LANE_CNT_G

LANE_CNT_G integer range 1 to 2 := 1
Generic

Definition at line 34 of file PgpSimModel.vhd.

◆ pgpTxClk

pgpTxClk in sl
Port

Definition at line 38 of file PgpSimModel.vhd.

◆ pgpTxClkRst

pgpTxClkRst in sl
Port

Definition at line 39 of file PgpSimModel.vhd.

◆ pgpTxIn

Definition at line 42 of file PgpSimModel.vhd.

◆ pgpTxOut

Definition at line 43 of file PgpSimModel.vhd.

◆ pgpTxMasters

pgpTxMasters in AxiStreamMasterArray ( 3 downto 0 )
Port

Definition at line 46 of file PgpSimModel.vhd.

◆ pgpTxSlaves

pgpTxSlaves out AxiStreamSlaveArray ( 3 downto 0 )
Port

Definition at line 47 of file PgpSimModel.vhd.

◆ pgpRxClk

pgpRxClk in sl
Port

Definition at line 50 of file PgpSimModel.vhd.

◆ pgpRxClkRst

pgpRxClkRst in sl
Port

Definition at line 51 of file PgpSimModel.vhd.

◆ pgpRxIn

Definition at line 54 of file PgpSimModel.vhd.

◆ pgpRxOut

Definition at line 55 of file PgpSimModel.vhd.

◆ pgpRxMasters

pgpRxMasters out AxiStreamMasterArray ( 3 downto 0 )
Port

Definition at line 58 of file PgpSimModel.vhd.

◆ pgpRxMasterMuxed

Definition at line 59 of file PgpSimModel.vhd.

◆ pgpRxCtrl

pgpRxCtrl in AxiStreamCtrlArray ( 3 downto 0 )
Port

Definition at line 63 of file PgpSimModel.vhd.

◆ ieee

ieee
Library

Definition at line 18 of file PgpSimModel.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 19 of file PgpSimModel.vhd.

◆ std_logic_arith

std_logic_arith
Package

Definition at line 20 of file PgpSimModel.vhd.

◆ std_logic_unsigned

Definition at line 21 of file PgpSimModel.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 23 of file PgpSimModel.vhd.

◆ Pgp2bPkg

Pgp2bPkg
Package

Definition at line 24 of file PgpSimModel.vhd.

◆ AxiStreamPkg

AxiStreamPkg
Package

Definition at line 25 of file PgpSimModel.vhd.

◆ SsiPkg

SsiPkg
Package

Definition at line 26 of file PgpSimModel.vhd.


The documentation for this class was generated from the following file: