SURF  1.0
Pgp2bTx Entity Reference
+ Inheritance diagram for Pgp2bTx:
+ Collaboration diagram for Pgp2bTx:

Entities

Pgp2bTx  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
std_logic_arith 
std_logic_unsigned 
StdRtlPkg  Package <StdRtlPkg>
Pgp2bPkg  Package <Pgp2bPkg>
AxiStreamPkg  Package <AxiStreamPkg>
SsiPkg  Package <SsiPkg>

Generics

TPD_G  time := 1 ns
TX_LANE_CNT_G  integer range 1 to 2 := 1
VC_INTERLEAVE_G  integer := 1
PAYLOAD_CNT_TOP_G  integer := 7
NUM_VC_EN_G  integer range 1 to 4 := 4

Ports

pgpTxClkEn   in sl := ' 1 '
pgpTxClk   in sl
pgpTxClkRst   in sl
pgpTxIn   in Pgp2bTxInType
pgpTxOut   out Pgp2bTxOutType
locLinkReady   in sl
pgpTxMasters   in AxiStreamMasterArray ( 3 downto 0 )
pgpTxSlaves   out AxiStreamSlaveArray ( 3 downto 0 )
locFifoStatus   in AxiStreamCtrlArray ( 3 downto 0 )
remFifoStatus   in AxiStreamCtrlArray ( 3 downto 0 )
phyTxLanesOut   out Pgp2bTxPhyLaneOutArray ( 0 to TX_LANE_CNT_G - 1 )
phyTxReady   in sl

Detailed Description

See also
entity

Definition at line 30 of file Pgp2bTx.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 32 of file Pgp2bTx.vhd.

◆ TX_LANE_CNT_G

TX_LANE_CNT_G integer range 1 to 2 := 1
Generic

Definition at line 33 of file Pgp2bTx.vhd.

◆ VC_INTERLEAVE_G

VC_INTERLEAVE_G integer := 1
Generic

Definition at line 34 of file Pgp2bTx.vhd.

◆ PAYLOAD_CNT_TOP_G

PAYLOAD_CNT_TOP_G integer := 7
Generic

Definition at line 35 of file Pgp2bTx.vhd.

◆ NUM_VC_EN_G

NUM_VC_EN_G integer range 1 to 4 := 4
Generic

Definition at line 37 of file Pgp2bTx.vhd.

◆ pgpTxClkEn

pgpTxClkEn in sl := ' 1 '
Port

Definition at line 41 of file Pgp2bTx.vhd.

◆ pgpTxClk

pgpTxClk in sl
Port

Definition at line 42 of file Pgp2bTx.vhd.

◆ pgpTxClkRst

pgpTxClkRst in sl
Port

Definition at line 43 of file Pgp2bTx.vhd.

◆ pgpTxIn

Definition at line 46 of file Pgp2bTx.vhd.

◆ pgpTxOut

Definition at line 47 of file Pgp2bTx.vhd.

◆ locLinkReady

locLinkReady in sl
Port

Definition at line 48 of file Pgp2bTx.vhd.

◆ pgpTxMasters

pgpTxMasters in AxiStreamMasterArray ( 3 downto 0 )
Port

Definition at line 51 of file Pgp2bTx.vhd.

◆ pgpTxSlaves

pgpTxSlaves out AxiStreamSlaveArray ( 3 downto 0 )
Port

Definition at line 52 of file Pgp2bTx.vhd.

◆ locFifoStatus

locFifoStatus in AxiStreamCtrlArray ( 3 downto 0 )
Port

Definition at line 53 of file Pgp2bTx.vhd.

◆ remFifoStatus

remFifoStatus in AxiStreamCtrlArray ( 3 downto 0 )
Port

Definition at line 54 of file Pgp2bTx.vhd.

◆ phyTxLanesOut

Definition at line 57 of file Pgp2bTx.vhd.

◆ phyTxReady

phyTxReady in sl
Port

Definition at line 59 of file Pgp2bTx.vhd.

◆ ieee

ieee
Library

Definition at line 19 of file Pgp2bTx.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 20 of file Pgp2bTx.vhd.

◆ std_logic_arith

std_logic_arith
Package

Definition at line 21 of file Pgp2bTx.vhd.

◆ std_logic_unsigned

Definition at line 22 of file Pgp2bTx.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 23 of file Pgp2bTx.vhd.

◆ Pgp2bPkg

Pgp2bPkg
Package

Definition at line 24 of file Pgp2bTx.vhd.

◆ AxiStreamPkg

AxiStreamPkg
Package

Definition at line 25 of file Pgp2bTx.vhd.

◆ SsiPkg

SsiPkg
Package

Definition at line 26 of file Pgp2bTx.vhd.


The documentation for this class was generated from the following file: