SURF  1.0
Generics | Ports | Libraries | Use Clauses
JesdIlasGen Entity Reference
protocols » jesd204b
+ Inheritance diagram for JesdIlasGen:

Entities

rtl  architecture
 

Libraries

ieee 

Use Clauses

std_logic_1164 
std_logic_unsigned 
std_logic_arith 
StdRtlPkg  Package <StdRtlPkg>
jesd204bpkg 

Generics

TPD_G  time := 1 ns
F_G  positive := 2

Ports

clk   in sl
rst   in sl
enable_i   in sl
ilas_i   in sl
lmfc_i   in sl
ilasData_o   out slv ( GT_WORD_SIZE_C* 8 - 1 downto 0 )
ilasK_o   out slv ( GT_WORD_SIZE_C- 1 downto 0 )

Detailed Description

See also
entity

Definition at line 29 of file JesdIlasGen.vhd.

Member Data Documentation

◆ TPD_G

TPD_G time := 1 ns
Generic

Definition at line 31 of file JesdIlasGen.vhd.

◆ F_G

F_G positive := 2
Generic

Definition at line 32 of file JesdIlasGen.vhd.

◆ clk

clk in sl
Port

Definition at line 34 of file JesdIlasGen.vhd.

◆ rst

rst in sl
Port

Definition at line 35 of file JesdIlasGen.vhd.

◆ enable_i

enable_i in sl
Port

Definition at line 38 of file JesdIlasGen.vhd.

◆ ilas_i

ilas_i in sl
Port

Definition at line 41 of file JesdIlasGen.vhd.

◆ lmfc_i

lmfc_i in sl
Port

Definition at line 44 of file JesdIlasGen.vhd.

◆ ilasData_o

ilasData_o out slv ( GT_WORD_SIZE_C* 8 - 1 downto 0 )
Port

Definition at line 47 of file JesdIlasGen.vhd.

◆ ilasK_o

ilasK_o out slv ( GT_WORD_SIZE_C- 1 downto 0 )
Port

Definition at line 49 of file JesdIlasGen.vhd.

◆ ieee

ieee
Library

Definition at line 19 of file JesdIlasGen.vhd.

◆ std_logic_1164

std_logic_1164
Package

Definition at line 20 of file JesdIlasGen.vhd.

◆ std_logic_unsigned

std_logic_unsigned
Package

Definition at line 21 of file JesdIlasGen.vhd.

◆ std_logic_arith

std_logic_arith
Package

Definition at line 22 of file JesdIlasGen.vhd.

◆ StdRtlPkg

StdRtlPkg
Package

Definition at line 24 of file JesdIlasGen.vhd.

◆ jesd204bpkg

jesd204bpkg
Package

Definition at line 25 of file JesdIlasGen.vhd.

The documentation for this class was generated from the following file: